From 459655abe7073d4bdbd36d7f1876eb73c1795768 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 20 May 2020 23:09:51 -0700 Subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt. In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs. Differences in auto-generated SPD from current SPD are as follows: Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0. BUG=b:155239397,b:147321551 Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/41615 Reviewed-by: Nick Vaccaro Reviewed-by: Karthik Ramasubramanian Tested-by: build bot (Jenkins) --- src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc | 5 +++++ .../google/volteer/variants/malefor/memory/dram_id.generated.txt | 2 ++ .../google/volteer/variants/malefor/memory/mem_list_variant.txt | 1 + 3 files changed, 8 insertions(+) create mode 100644 src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc create mode 100644 src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt create mode 100644 src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt (limited to 'src/mainboard/google/volteer/variants/malefor') diff --git a/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc b/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc new file mode 100644 index 0000000000..4c95819cb9 --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-or-later +## This is an auto-generated file. Do not edit!! + +SPD_SOURCES = +SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = K4U6E3S4AA-MGCL diff --git a/src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt b/src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt new file mode 100644 index 0000000000..9bf0bd9af0 --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt @@ -0,0 +1,2 @@ +DRAM Part Name ID to assign +K4U6E3S4AA-MGCL 0 (0000) diff --git a/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt new file mode 100644 index 0000000000..a226d2f741 --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt @@ -0,0 +1 @@ +K4U6E3S4AA-MGCL -- cgit v1.2.3