From 3c78eae369ff3f96dbc901ca6c258b3e5fea847e Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Wed, 18 Jan 2017 14:31:59 -0800 Subject: google/eve: Adjust DPTF parameters - Remove the 0mA entry for the charger performance table - Slightly raise the passive limit for TSR2/TSR3 to 55C BUG=chrome-os-partner:58666 TEST=manual testing on P1 system Change-Id: I75c66afe04afbbdb64a45833eb938e57ff21b392 Signed-off-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/18172 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/google/eve/acpi/dptf.asl | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/eve/acpi/dptf.asl b/src/mainboard/google/eve/acpi/dptf.asl index 95985f6a41..eaacb46f43 100644 --- a/src/mainboard/google/eve/acpi/dptf.asl +++ b/src/mainboard/google/eve/acpi/dptf.asl @@ -29,12 +29,12 @@ #define DPTF_TSR2_SENSOR_ID 3 #define DPTF_TSR2_SENSOR_NAME "DRAM" -#define DPTF_TSR2_PASSIVE 50 +#define DPTF_TSR2_PASSIVE 55 #define DPTF_TSR2_CRITICAL 75 #define DPTF_TSR3_SENSOR_ID 4 #define DPTF_TSR3_SENSOR_NAME "eMMC" -#define DPTF_TSR3_PASSIVE 50 +#define DPTF_TSR3_PASSIVE 55 #define DPTF_TSR3_CRITICAL 75 #undef DPTF_ENABLE_FAN_CONTROL @@ -46,7 +46,6 @@ Name (CHPS, Package () { Package () { 0, 0, 0, 0, 24, 0x800, "mA", 0 }, /* 2000mA */ Package () { 0, 0, 0, 0, 16, 0x400, "mA", 0 }, /* 1000mA */ Package () { 0, 0, 0, 0, 8, 0x200, "mA", 0 }, /* 500mA */ - Package () { 0, 0, 0, 0, 0, 0x000, "mA", 0 }, /* 0mA */ }) Name (DTRT, Package () { -- cgit v1.2.3