From 44f558ec262c671d4db76ae25eb1b8e24204d002 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 24 Feb 2020 13:26:04 +0100 Subject: treewide: capitalize 'USB' Change-Id: I7650786ea50465a4c2d11de948fdb81f4e509772 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/39100 Reviewed-by: Patrick Georgi Tested-by: build bot (Jenkins) --- src/mainboard/google/butterfly/early_init.c | 4 ++-- src/mainboard/google/link/early_init.c | 2 +- src/mainboard/google/mistral/mainboard.c | 2 +- src/mainboard/google/oak/mainboard.c | 2 +- src/mainboard/google/parrot/early_init.c | 2 +- src/mainboard/google/stout/early_init.c | 4 ++-- 6 files changed, 8 insertions(+), 8 deletions(-) (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c index 13819f1b90..35f75c4232 100644 --- a/src/mainboard/google/butterfly/early_init.c +++ b/src/mainboard/google/butterfly/early_init.c @@ -67,7 +67,7 @@ void mainboard_late_rcba_config(void) } const struct southbridge_usb_port mainboard_usb_ports[] = { - /* enabled power usb oc pin */ + /* enabled power USB oc pin */ { 1, 0, -1 }, /* P0: Right USB 3.0 #1 (no OC) */ { 1, 0, -1 }, /* P1: Right USB 3.0 #2 (no OC) */ { 1, 0, -1 }, /* P2: Camera (no OC) */ @@ -120,7 +120,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) .dimm_channel1_disabled = 2, .max_ddr3_freq = 1600, .usb_port_config = { - /* enabled usb oc pin length */ + /* enabled USB oc pin length */ { 1, 0, 0x0040 }, /* P0: Right USB 3.0 #1 (no OC) */ { 1, 0, 0x0040 }, /* P1: Right USB 3.0 #2 (no OC) */ { 1, 0, 0x0040 }, /* P2: Camera (no OC) */ diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c index c234e5b848..7d1c177d92 100644 --- a/src/mainboard/google/link/early_init.c +++ b/src/mainboard/google/link/early_init.c @@ -154,7 +154,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) } const struct southbridge_usb_port mainboard_usb_ports[] = { - /* enabled power usb oc pin */ + /* enabled power USB oc pin */ { 0, 0, -1 }, /* P0: Empty */ { 1, 0, 0 }, /* P1: Left USB 1 (OC0) */ { 1, 0, 1 }, /* P2: Left USB 2 (OC1) */ diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c index e36a1c70a7..4a109f13d7 100644 --- a/src/mainboard/google/mistral/mainboard.c +++ b/src/mainboard/google/mistral/mainboard.c @@ -26,7 +26,7 @@ static struct usb_board_data usb1_board_data = { static void setup_usb(void) { - /* Setting Secondary usb controller */ + /* Setting Secondary USB controller */ setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data); } diff --git a/src/mainboard/google/oak/mainboard.c b/src/mainboard/google/oak/mainboard.c index 421826cdeb..864837bbd4 100644 --- a/src/mainboard/google/oak/mainboard.c +++ b/src/mainboard/google/oak/mainboard.c @@ -145,7 +145,7 @@ static void configure_usb(void) static void configure_usb_hub(void) { - /* set usb hub reset pin (low active) to high */ + /* set USB hub reset pin (low active) to high */ if (board_id() + CONFIG_BOARD_ID_ADJUSTMENT > 4) gpio_output(GPIO(UTXD3), 1); } diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c index 01c452637d..917d16591e 100644 --- a/src/mainboard/google/parrot/early_init.c +++ b/src/mainboard/google/parrot/early_init.c @@ -116,7 +116,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) } const struct southbridge_usb_port mainboard_usb_ports[] = { - /* enabled power usb oc pin */ + /* enabled power USB oc pin */ { 0, 0, -1 }, /* P0: Empty */ { 1, 0, 0 }, /* P1: Left USB 1 (OC0) */ { 1, 0, 1 }, /* P2: Left USB 2 (OC1) */ diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c index 07c19c5ae0..b4e96f0dd3 100644 --- a/src/mainboard/google/stout/early_init.c +++ b/src/mainboard/google/stout/early_init.c @@ -131,7 +131,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) .dimm_channel1_disabled = 2, .max_ddr3_freq = 1600, .usb_port_config = { - /* enabled usb oc pin length */ + /* enabled USB oc pin length */ { 1, 0, 0x0040 }, /* P0: USB 3.0 1 (OC0) */ { 1, 0, 0x0040 }, /* P1: USB 3.0 2 (OC0) */ { 0, 1, 0x0000 }, /* P2: Empty */ @@ -171,7 +171,7 @@ int mainboard_should_reset_usb(int s3resume) } const struct southbridge_usb_port mainboard_usb_ports[] = { - /* enabled usb oc pin length */ + /* enabled USB oc pin length */ {1, 0, 0}, /* P0: USB 3.0 1 (OC0) */ {1, 0, 0}, /* P1: USB 3.0 2 (OC0) */ {0, 0, 0}, /* P2: Empty */ -- cgit v1.2.3