From d2b9ec13622d34714b4ecf8b9daf53b32665d3d7 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Sat, 27 Oct 2018 09:41:02 +0200
Subject: src: Remove unneeded include "{arch,cpu}/cpu.h"

Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
 src/mainboard/google/butterfly/romstage.c  | 1 -
 src/mainboard/google/kahlee/mptable.c      | 1 -
 src/mainboard/google/link/romstage.c       | 1 -
 src/mainboard/google/nyan/romstage.c       | 1 -
 src/mainboard/google/nyan_big/romstage.c   | 1 -
 src/mainboard/google/nyan_blaze/romstage.c | 1 -
 src/mainboard/google/parrot/romstage.c     | 1 -
 src/mainboard/google/stout/romstage.c      | 1 -
 8 files changed, 8 deletions(-)

(limited to 'src/mainboard/google')

diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 75da9b7ad3..a8b3c6b100 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -28,7 +28,6 @@
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
 #include <halt.h>
 #if IS_ENABLED(CONFIG_CHROMEOS)
 #include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/google/kahlee/mptable.c b/src/mainboard/google/kahlee/mptable.c
index 2dcf4a3cb2..0cda7f7676 100644
--- a/src/mainboard/google/kahlee/mptable.c
+++ b/src/mainboard/google/kahlee/mptable.c
@@ -19,7 +19,6 @@
 #include <arch/ioapic.h>
 #include <string.h>
 #include <stdint.h>
-#include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <soc/southbridge.h>
 #include <amdblocks/amd_pci_util.h>
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 495c80ee6d..176be9d854 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -30,7 +30,6 @@
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/common/gpio.h>
 #include "ec/google/chromeec/ec.h"
-#include <arch/cpu.h>
 #include <halt.h>
 #include <cbfs.h>
 
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index b96917e482..ba5c0e23ab 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -14,7 +14,6 @@
  */
 
 #include <arch/cache.h>
-#include <arch/cpu.h>
 #include <arch/exception.h>
 #include <arch/io.h>
 #include <cbfs.h>
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index b96917e482..ba5c0e23ab 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -14,7 +14,6 @@
  */
 
 #include <arch/cache.h>
-#include <arch/cpu.h>
 #include <arch/exception.h>
 #include <arch/io.h>
 #include <cbfs.h>
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index cc8f90e3da..34967b6180 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -14,7 +14,6 @@
  */
 
 #include <arch/cache.h>
-#include <arch/cpu.h>
 #include <arch/exception.h>
 #include <arch/io.h>
 #include <cbfs.h>
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 98ebb25d82..bceaa884d0 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -28,7 +28,6 @@
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
 #include <halt.h>
 #include <cbfs.h>
 #include "ec/compal/ene932/ec.h"
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index d56dfd40be..a534f0f5d6 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -29,7 +29,6 @@
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
-#include <arch/cpu.h>
 #include <halt.h>
 #include <bootmode.h>
 #include <cbfs.h>
-- 
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