From fede56bf811972cd16e5b36c39c819b88fa74941 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Thu, 16 Nov 2017 18:53:47 -0700 Subject: google/kahlee: Add SPD function Add the mainboard_spd_read function in romstage and call the variants function. Grunt is the baseboard and has soldered down memory, so add it for the default weak SPD functions and build the SPDs in cbfs. Kahlee overrides the weak SPD function and falls back to the soc I2C SPD functions. BUG=b:67845441 TEST=Build and boot Kahlee. Change-Id: I789002bfadc1a2b24f9046708986d29c0e2daf33 Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/22486 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Marshall Dawson --- src/mainboard/google/kahlee/Kconfig | 1 + src/mainboard/google/kahlee/romstage.c | 10 ++++++- .../google/kahlee/variants/baseboard/Makefile.inc | 1 - .../baseboard/include/baseboard/variants.h | 1 + .../google/kahlee/variants/baseboard/memory.c | 31 ++++++++++++++++++++- .../google/kahlee/variants/grunt/Makefile.inc | 16 +++++++++++ .../google/kahlee/variants/grunt/spd/Makefile.inc | 26 ++++++++++++++++++ .../google/kahlee/variants/grunt/spd/empty.spd.hex | 32 ++++++++++++++++++++++ .../google/kahlee/variants/kahlee/Makefile.inc | 1 + .../kahlee/variants/kahlee/include/variant/gpio.h | 11 ++++---- .../google/kahlee/variants/kahlee/memory.c | 20 ++++++++++++++ 11 files changed, 141 insertions(+), 9 deletions(-) create mode 100644 src/mainboard/google/kahlee/variants/grunt/Makefile.inc create mode 100644 src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc create mode 100644 src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex create mode 100644 src/mainboard/google/kahlee/variants/kahlee/memory.c (limited to 'src/mainboard/google') diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 722229d6e9..690faa9e0b 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -24,6 +24,7 @@ config BOARD_GOOGLE_BASEBOARD_KAHLEE select EC_GOOGLE_CHROMEEC_LPC select HAVE_OPTION_TABLE select HAVE_ACPI_TABLES + select GENERIC_SPD_BIN select GFXUMA select GOOGLE_SMBIOS_MAINBOARD_VERSION select MAINBOARD_HAS_CHROMEOS diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 9a7f168f25..8f234a31bf 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. + * Copyright (C) 2017 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -12,3 +12,11 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ + +#include +#include + +int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) +{ + return variant_mainboard_read_spd(spdAddress, buf, len); +} diff --git a/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc b/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc index 94f388912c..83eec96be7 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/kahlee/variants/baseboard/Makefile.inc @@ -19,4 +19,3 @@ romstage-y += gpio.c romstage-y += memory.c ramstage-y += gpio.c -ramstage-y += memory.c diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h index 45d287a11c..1d38bd4f92 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h @@ -24,5 +24,6 @@ const GPIO_CONTROL *get_gpio_table(void); const struct sci_source *get_gpe_table(size_t *num); uint8_t variant_memory_sku(void); +int variant_mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len); #endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c index daa5ef9160..b8ec917633 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/memory.c +++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c @@ -13,9 +13,12 @@ * GNU General Public License for more details. */ -#include /* src/include/gpio.h */ #include +#include +#include /* src/include/gpio.h */ +#include #include +#include uint8_t __attribute__((weak)) variant_memory_sku(void) { @@ -28,3 +31,29 @@ uint8_t __attribute__((weak)) variant_memory_sku(void) return gpio_base2_value(pads, ARRAY_SIZE(pads)); } + +int __attribute__((weak)) variant_mainboard_read_spd(uint8_t spdAddress, + char *buf, size_t len) +{ + struct region_device spd_rdev; + u8 spd_index = variant_memory_sku(); + + printk(BIOS_INFO, "%s SPD index %d\n", __func__, spd_index); + + if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) { + printk(BIOS_ERR, "Error: spd.bin not found\n"); + return -1; + } + + if (len != region_device_sz(&spd_rdev)) { + printk(BIOS_ERR, "Error: spd.bin is not the correct size\n"); + return -1; + } + + if (rdev_readat(&spd_rdev, buf, 0, len) != len) { + printk(BIOS_ERR, "Error: couldn't read spd.bin\n"); + return -1; + } + + return 0; +} diff --git a/src/mainboard/google/kahlee/variants/grunt/Makefile.inc b/src/mainboard/google/kahlee/variants/grunt/Makefile.inc new file mode 100644 index 0000000000..319ff13b77 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/grunt/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2017 Google, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +subdirs-y += spd diff --git a/src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc b/src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc new file mode 100644 index 0000000000..c199629b78 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/grunt/spd/Makefile.inc @@ -0,0 +1,26 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2014 Google Inc. +## Copyright (C) 2015 Intel Corporation. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +LIB_SPD_DEPS = $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/spd/$(f).spd.hex) + +SPD_SOURCES = empty # 0b000 +SPD_SOURCES += empty # 1b001 +SPD_SOURCES += empty # 2b010 +SPD_SOURCES += empty # 3b011 +SPD_SOURCES += empty # 4b100 +SPD_SOURCES += empty # 5b101 +SPD_SOURCES += empty # 6b110 +SPD_SOURCES += empty # 7b111 diff --git a/src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex b/src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex new file mode 100644 index 0000000000..67b46cd239 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/grunt/spd/empty.spd.hex @@ -0,0 +1,32 @@ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/kahlee/variants/kahlee/Makefile.inc b/src/mainboard/google/kahlee/variants/kahlee/Makefile.inc index c5aab8ea27..83eec96be7 100644 --- a/src/mainboard/google/kahlee/variants/kahlee/Makefile.inc +++ b/src/mainboard/google/kahlee/variants/kahlee/Makefile.inc @@ -16,5 +16,6 @@ bootblock-y += gpio.c romstage-y += gpio.c +romstage-y += memory.c ramstage-y += gpio.c diff --git a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h index 28643fb08a..e7097c2f55 100644 --- a/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h +++ b/src/mainboard/google/kahlee/variants/kahlee/include/variant/gpio.h @@ -19,14 +19,13 @@ #ifndef __ACPI__ #include -#define MEM_CONFIG0 GPIO_135 -#define MEM_CONFIG1 GPIO_140 -#define MEM_CONFIG2 GPIO_144 /* - * Kahlee only uses 3 GPIOs to determine memory configuration, but other - * variants use 4. MEM_CONFIG3 must be defined so that the weak baseboard - * version of the variant_board_id() function can compile. + * Kahlee doesn't use MEM_CONFIG GPIOs, but they are required to build + * the baseboard weak memory_sku function. */ +#define MEM_CONFIG0 0 +#define MEM_CONFIG1 0 +#define MEM_CONFIG2 0 #define MEM_CONFIG3 0 /* SPI Write protect */ diff --git a/src/mainboard/google/kahlee/variants/kahlee/memory.c b/src/mainboard/google/kahlee/variants/kahlee/memory.c new file mode 100644 index 0000000000..1c7c8a11f3 --- /dev/null +++ b/src/mainboard/google/kahlee/variants/kahlee/memory.c @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +int variant_mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) +{ + /* Return error so the default I2C SPD read is used */ + return -1; +} -- cgit v1.2.3