From fa5d0f835b1f3bb8907e616913cbf7b91d09ef26 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 12 Nov 2019 19:11:50 +0100 Subject: nb/intel/sandybridge: Set up console in bootblock Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/hp/8770w/Makefile.inc | 2 ++ src/mainboard/hp/8770w/early_init.c | 61 +++++++++++++++++++++++++++++++++++++ src/mainboard/hp/8770w/romstage.c | 60 ------------------------------------ 3 files changed, 63 insertions(+), 60 deletions(-) create mode 100644 src/mainboard/hp/8770w/early_init.c delete mode 100644 src/mainboard/hp/8770w/romstage.c (limited to 'src/mainboard/hp/8770w') diff --git a/src/mainboard/hp/8770w/Makefile.inc b/src/mainboard/hp/8770w/Makefile.inc index 910d6a6191..f4b387abed 100644 --- a/src/mainboard/hp/8770w/Makefile.inc +++ b/src/mainboard/hp/8770w/Makefile.inc @@ -15,3 +15,5 @@ bootblock-y += gpio.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/hp/8770w/early_init.c b/src/mainboard/hp/8770w/early_init.c new file mode 100644 index 0000000000..3bd2ed7f51 --- /dev/null +++ b/src/mainboard/hp/8770w/early_init.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Iru Cai + * Copyright (C) 2018 Robert Reeves + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 1, 0 }, /* Dock USB3.0 */ + { 1, 1, 0 }, /* Conn */ + { 1, 1, 1 }, /* USB 3.0 */ + { 1, 1, 1 }, /* USB 3.0 */ + { 1, 0, 2 }, /* Express Card */ + { 1, 0, 2 }, /* Bluetooth */ + { 0, 0, 3 }, + { 1, 0, 3 }, /* Smart Card */ + { 1, 1, 4 }, /* Fingerprint Reader */ + { 1, 1, 4 }, /* Conn (Charger) */ + { 1, 0, 5 }, /* Camera */ + { 1, 0, 5 }, /* Dock */ + { 1, 0, 6 }, /* WWAN */ + { 1, 0, 6 }, /* Conn (eSATA Combo) */ +}; + +void bootblock_mainboard_early_init(void) +{ + lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + kbc1126_enter_conf(); + kbc1126_mailbox_init(); + kbc1126_kbc_init(); + kbc1126_ec_init(); + kbc1126_pm1_init(); + kbc1126_exit_conf(); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[1], 0x51, id_only); + read_spd(&spd[2], 0x52, id_only); + read_spd(&spd[3], 0x53, id_only); +} diff --git a/src/mainboard/hp/8770w/romstage.c b/src/mainboard/hp/8770w/romstage.c deleted file mode 100644 index 8eefe4d6a2..0000000000 --- a/src/mainboard/hp/8770w/romstage.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Iru Cai - * Copyright (C) 2018 Robert Reeves - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include - -#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, /* Dock USB3.0 */ - { 1, 1, 0 }, /* Conn */ - { 1, 1, 1 }, /* USB 3.0 */ - { 1, 1, 1 }, /* USB 3.0 */ - { 1, 0, 2 }, /* Express Card */ - { 1, 0, 2 }, /* Bluetooth */ - { 0, 0, 3 }, - { 1, 0, 3 }, /* Smart Card */ - { 1, 1, 4 }, /* Fingerprint Reader */ - { 1, 1, 4 }, /* Conn (Charger) */ - { 1, 0, 5 }, /* Camera */ - { 1, 0, 5 }, /* Dock */ - { 1, 0, 6 }, /* WWAN */ - { 1, 0, 6 }, /* Conn (eSATA Combo) */ -}; - -void mainboard_config_superio(void) -{ - lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - kbc1126_enter_conf(); - kbc1126_mailbox_init(); - kbc1126_kbc_init(); - kbc1126_ec_init(); - kbc1126_pm1_init(); - kbc1126_exit_conf(); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} -- cgit v1.2.3