From 9a684fcb0fe28a47d23b7cb3acbd2add47c6ac50 Mon Sep 17 00:00:00 2001 From: Jens Rottmann Date: Mon, 30 Aug 2010 16:36:51 +0000 Subject: Restructured all vendors' Kconfig files to no longer source the boards' Kconfigs from within the choice/endchoice block. This makes it possible to define user visible board specific options. Moved all vendor names and PCI ids to the vendors' Kconfigs. Now all options in each file depend on the same symbol, so replaced all "depends on"s with a single "if". Sorted boards (sort -d), cleaned whitespace. This patch also introduces a dummy option BOARD_SPECIFIC_OPTIONS, which is always "y" and never used. It it simply needed to have something to attach the boards' "select" statements to. Signed-off-by: Jens Rottmann Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/hp/dl145_g3/Kconfig | 22 ++++++---------------- 1 file changed, 6 insertions(+), 16 deletions(-) (limited to 'src/mainboard/hp/dl145_g3') diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig index 956aaffde5..e2dc909e1e 100644 --- a/src/mainboard/hp/dl145_g3/Kconfig +++ b/src/mainboard/hp/dl145_g3/Kconfig @@ -1,5 +1,7 @@ -config BOARD_HP_DL145_G3 - bool "ProLiant DL145 G3" +if BOARD_HP_DL145_G3 + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y select ARCH_X86 select CPU_AMD_SOCKET_F select NORTHBRIDGE_AMD_AMDK8 @@ -20,69 +22,57 @@ config BOARD_HP_DL145_G3 config MAINBOARD_DIR string default hp/dl145_g3 - depends on BOARD_HP_DL145_G3 config DCACHE_RAM_BASE hex default 0xcc000 - depends on BOARD_HP_DL145_G3 config DCACHE_RAM_SIZE hex default 0x04000 - depends on BOARD_HP_DL145_G3 config DCACHE_RAM_GLOBAL_VAR_SIZE hex default 0x01000 - depends on BOARD_HP_DL145_G3 config APIC_ID_OFFSET hex default 0x8 - depends on BOARD_HP_DL145_G3 config SB_HT_CHAIN_ON_BUS0 int default 2 - depends on BOARD_HP_DL145_G3 config MAINBOARD_PART_NUMBER string default "ProLiant DL145 G3" - depends on BOARD_HP_DL145_G3 config HW_MEM_HOLE_SIZEK hex default 0x100000 - depends on BOARD_HP_DL145_G3 config MAX_CPUS int default 4 - depends on BOARD_HP_DL145_G3 config MAX_PHYSICAL_CPUS int default 2 - depends on BOARD_HP_DL145_G3 config HT_CHAIN_END_UNITID_BASE hex default 0x1 - depends on BOARD_HP_DL145_G3 config HT_CHAIN_UNITID_BASE hex default 0x6 - depends on BOARD_HP_DL145_G3 config SB_HT_CHAIN_ON_BUS0 int default 2 - depends on BOARD_HP_DL145_G3 config IRQ_SLOT_COUNT int default 15 - depends on BOARD_HP_DL145_G3 + +endif # BOARD_HP_DL145_G3 -- cgit v1.2.3