From 3cedcfa1c50b336c9f0418bb0c2c1abedd455fbd Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Tue, 8 Sep 2020 19:50:55 +0800 Subject: mb/hp: Add HP EliteBook Folio 9480m --- src/mainboard/hp/folio_9480m/romstage.c | 52 +++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 src/mainboard/hp/folio_9480m/romstage.c (limited to 'src/mainboard/hp/folio_9480m/romstage.c') diff --git a/src/mainboard/hp/folio_9480m/romstage.c b/src/mainboard/hp/folio_9480m/romstage.c new file mode 100644 index 0000000000..e970100e77 --- /dev/null +++ b/src/mainboard/hp/folio_9480m/romstage.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +void mainboard_config_rcba(void) +{ + RCBA16(D31IR) = DIR_ROUTE(PIRQF, PIRQD, PIRQC, PIRQA); + RCBA16(D29IR) = DIR_ROUTE(PIRQB, PIRQD, PIRQA, PIRQC); + RCBA16(D28IR) = DIR_ROUTE(PIRQA, PIRQA, PIRQA, PIRQA); + RCBA16(D27IR) = DIR_ROUTE(PIRQG, PIRQB, PIRQC, PIRQD); + RCBA16(D26IR) = DIR_ROUTE(PIRQA, PIRQF, PIRQC, PIRQD); + RCBA16(D25IR) = DIR_ROUTE(PIRQE, PIRQB, PIRQC, PIRQD); + RCBA16(D22IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); + RCBA16(D20IR) = DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD); +} + +/* FIXME: called after romstage_common, remove it if not used */ +void mb_late_romstage_setup(void) +{ +} + +void mb_get_spd_map(uint8_t spd_map[4]) +{ + spd_map[0] = 0xa0; + spd_map[2] = 0xa4; +} + +void mainboard_fill_pei_data(struct pei_data *pei_data) +{ + struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { + /* Length, Enable, OCn#, Location */ + { 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE }, + { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, + { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, + { 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE }, + { 0x0110, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE }, + { 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE }, + { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, + { 0x0040, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL }, + }; + struct usb3_port_setting usb3_ports[MAX_USB3_PORTS] = { + { 1, USB_OC_PIN_SKIP }, + { 1, USB_OC_PIN_SKIP }, + { 1, USB_OC_PIN_SKIP }, + { 0, USB_OC_PIN_SKIP }, + }; + memcpy(pei_data->usb2_ports, usb2_ports, sizeof(usb2_ports)); + memcpy(pei_data->usb3_ports, usb3_ports, sizeof(usb3_ports)); +} -- cgit v1.2.3