From d75800c7f2476bee243cc22255acb54d6676d4bc Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 12 May 2014 21:56:27 -0600 Subject: intel/bayleybay: Add Intel's Bayley Bay mainboard MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Bay Trail-I Platform – Bayley Bay-I Customer Reference Board The Bayley Bay CRB-I is a dual-channel DDR3L SO-DIMM non-ECC platform. It is designed to support the Bay Trail-I SoC. This implementation uses the Intel FSP (Vist the Intel FSP website for details on FSP architecture and support). This code does not currently support S3. All other features and IO ports are functional. Booted on Ubuntu 14.04, Mint 16, Fedora 20 with SeaBIOS payload. Memtest86, FWTS, and other tests pass. Notes: - Generates a 2MB binary to be flashed to the upper 2MB of the ROM, to preserve the existing Intel Flash Descriptor & TXE binary. - Tested with B0 & B3 Baytrail I parts Board support page will be updated on acceptance. Change-Id: I80c836c7590f2dc25ec854e7a0bb939024cea600 Signed-off-by: Martin Roth Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/5792 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/intel/bayleybay_fsp/acpi/ec.asl | 0 .../intel/bayleybay_fsp/acpi/mainboard.asl | 25 ++++++++++++++++++++++ src/mainboard/intel/bayleybay_fsp/acpi/superio.asl | 0 src/mainboard/intel/bayleybay_fsp/acpi/video.asl | 0 4 files changed, 25 insertions(+) create mode 100644 src/mainboard/intel/bayleybay_fsp/acpi/ec.asl create mode 100644 src/mainboard/intel/bayleybay_fsp/acpi/mainboard.asl create mode 100644 src/mainboard/intel/bayleybay_fsp/acpi/superio.asl create mode 100644 src/mainboard/intel/bayleybay_fsp/acpi/video.asl (limited to 'src/mainboard/intel/bayleybay_fsp/acpi') diff --git a/src/mainboard/intel/bayleybay_fsp/acpi/ec.asl b/src/mainboard/intel/bayleybay_fsp/acpi/ec.asl new file mode 100644 index 0000000000..e69de29bb2 diff --git a/src/mainboard/intel/bayleybay_fsp/acpi/mainboard.asl b/src/mainboard/intel/bayleybay_fsp/acpi/mainboard.asl new file mode 100644 index 0000000000..c1884c5514 --- /dev/null +++ b/src/mainboard/intel/bayleybay_fsp/acpi/mainboard.asl @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +Device (PWRB) +{ + Name(_HID, EisaId("PNP0C0C")) +} diff --git a/src/mainboard/intel/bayleybay_fsp/acpi/superio.asl b/src/mainboard/intel/bayleybay_fsp/acpi/superio.asl new file mode 100644 index 0000000000..e69de29bb2 diff --git a/src/mainboard/intel/bayleybay_fsp/acpi/video.asl b/src/mainboard/intel/bayleybay_fsp/acpi/video.asl new file mode 100644 index 0000000000..e69de29bb2 -- cgit v1.2.3