From c319bab3cd416d85330774f9974b41fcb49075a7 Mon Sep 17 00:00:00 2001 From: Lijian Zhao Date: Sat, 8 Jul 2017 18:16:13 -0700 Subject: intel/cannonlake_rvp: Split RVP boards and SPD Add both Cannonlake U DDR4 RVP and Cannonlake Y LPDDR4 RVP support. Implement SPD entry to FSPM for both platforms, seperated platform specific DQ/DQS/Rcomp input to FSPM as well. Change-Id: If71662353ddba89a9e831503a2d80dd5ebd65de3 Signed-off-by: Lijian Zhao Reviewed-on: https://review.coreboot.org/20503 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/intel/cannonlake_rvp/Kconfig.name | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/mainboard/intel/cannonlake_rvp/Kconfig.name') diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig.name b/src/mainboard/intel/cannonlake_rvp/Kconfig.name index 4935603cd0..1102e396d1 100644 --- a/src/mainboard/intel/cannonlake_rvp/Kconfig.name +++ b/src/mainboard/intel/cannonlake_rvp/Kconfig.name @@ -1,2 +1,4 @@ -config BOARD_INTEL_CANNONLAKE_RVP - bool "Cannonlake DDR4 RVP" +config BOARD_INTEL_CANNONLAKE_RVPU + bool "Cannonlake U DDR4 RVP" +config BOARD_INTEL_CANNONLAKE_RVPY + bool "Cannonlake Y LPDDR4 RVP" -- cgit v1.2.3