From dfc9917080a9175fef2c40288c586ff9dd5861f3 Mon Sep 17 00:00:00 2001 From: Maulik V Vaghela Date: Tue, 7 Aug 2018 12:06:23 +0530 Subject: mb/intel/coffeelake_rvp: Add support for new board coffeelake RVP Add support for new board coffeelake RVP. This patch is a copy patch and copies entire coffeelake_rvp folder from cannonlake_rvp. Changes done on top of copy: 1. Change copyright year from 2017 to 2018 2. Rename Cannonlake to Coffelake whenever applicable 3. Update entries in Kconfig and Kconfig.name 4. Rename variant directories to match coffeelake boards Change-Id: Id37bfeb0ae51fd630fec96273216dbb2900782c7 Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/27904 Reviewed-by: Arthur Heymans Reviewed-by: Naresh Solanki Reviewed-by: Lijian Zhao Tested-by: build bot (Jenkins) --- .../variants/baseboard/include/baseboard/gpio.h | 21 +++++++++++++ .../baseboard/include/baseboard/variants.h | 35 ++++++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/gpio.h create mode 100644 src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h (limited to 'src/mainboard/intel/coffeelake_rvp/variants/baseboard/include') diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/gpio.h new file mode 100644 index 0000000000..36318d5ef7 --- /dev/null +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef __BASEBOARD_GPIO_H__ +#define __BASEBOARD_GPIO_H__ + +#include + +#endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h new file mode 100644 index 0000000000..cdae0f9738 --- /dev/null +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/include/baseboard/variants.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __BASEBOARD_VARIANTS_H__ +#define __BASEBOARD_VARIANTS_H__ + +#include +#include +#include + +/* The next set of functions return the gpio table and fill in the number of + * entries for each table. */ + +const struct pad_config *variant_gpio_table(size_t *num); +const struct pad_config *variant_early_gpio_table(size_t *num); + +const struct cros_gpio *variant_cros_gpios(size_t *num); + +/* Seed the NHLT tables with the board specific information. */ +struct nhlt; +void variant_nhlt_init(struct nhlt *nhlt); + +#endif /*__BASEBOARD_VARIANTS_H__ */ -- cgit v1.2.3