From 798ef2893c44ce3194c539c8c5db33d11e8edbac Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Mon, 29 Mar 2010 22:08:01 +0000 Subject: This drops the ASSEMBLY define from romstage.c, too (since it's not assembly code, this was a dirty hack anyways) Also run awk 1 RS= ORS="\n\n" < $FILE > $FILE.nonewlines mv $FILE.nonewlines $FILE on romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c cut some holes into the source. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/intel/d945gclf/romstage.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/intel/d945gclf') diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index ab3576c944..48f3f78e7b 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -19,7 +19,6 @@ // __PRE_RAM__ means: use "unsigned" for device, not a struct. - /* Configuration of the i945 driver */ #define CHIPSET_I945GC 1 #define CHANNEL_XOR_RANDOMIZATION 1 @@ -98,7 +97,6 @@ static void ich7_enable_lpc(void) pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x007c0681); } - /* This box has two superios, so enabling serial becomes slightly excessive. * We disable a lot of stuff to make sure that there are no conflicts between * the two. Also set up the GPIOs from the beginning. This is the "no schematic -- cgit v1.2.3