From 8c905a82f5d07ae7936114d392ec897756c0df9d Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Thu, 7 Feb 2019 09:00:47 +0100
Subject: mb/{asrock,intel,kontron}: Include missing <arch/io.h>

Also includes lines sorted

Change-Id: Idf2b41f471f531b2a9c3e620563e3c658dea4729
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31267
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/intel/dg41wv/romstage.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

(limited to 'src/mainboard/intel/dg41wv')

diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c
index 7038538e80..2caf5ec4d7 100644
--- a/src/mainboard/intel/dg41wv/romstage.c
+++ b/src/mainboard/intel/dg41wv/romstage.c
@@ -15,15 +15,16 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/io.h>
 #include <console/console.h>
-#include <southbridge/intel/i82801gx/i82801gx.h>
-#include <southbridge/intel/common/gpio.h>
-#include <northbridge/intel/x4x/x4x.h>
-#include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>
-#include <superio/winbond/w83627dhg/w83627dhg.h>
-#include <superio/winbond/common/winbond.h>
+#include <cpu/x86/bist.h>
 #include <northbridge/intel/x4x/iomap.h>
+#include <northbridge/intel/x4x/x4x.h>
+#include <southbridge/intel/common/gpio.h>
+#include <southbridge/intel/i82801gx/i82801gx.h>
+#include <superio/winbond/common/winbond.h>
+#include <superio/winbond/w83627dhg/w83627dhg.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)
-- 
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