From 17887d08fee6d10bc4ff8758694b88435365e5d7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Tue, 23 Jul 2019 19:08:01 +0300
Subject: mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__
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Use explicit simple PCI config accessors here.

Change-Id: Ifa3814fdd7795479ca5fdbfc4deb3fe8db9805f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
 src/mainboard/intel/emeraldlake2/chromeos.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

(limited to 'src/mainboard/intel/emeraldlake2')

diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c
index 699141fc0f..74fe20f548 100644
--- a/src/mainboard/intel/emeraldlake2/chromeos.c
+++ b/src/mainboard/intel/emeraldlake2/chromeos.c
@@ -15,6 +15,7 @@
 
 #include <string.h>
 #include <bootmode.h>
+#include <boot/coreboot_tables.h>
 #include <device/pci_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
@@ -22,9 +23,6 @@
 #include <southbridge/intel/common/gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
-#if ENV_RAMSTAGE
-#include <boot/coreboot_tables.h>
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
 	struct lb_gpio chromeos_gpios[] = {
@@ -45,7 +43,6 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	};
 	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
-#endif
 
 int get_recovery_mode_switch(void)
 {
-- 
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