From a23e0c9d74b7f06738ebf28b068e1bd63f246982 Mon Sep 17 00:00:00 2001 From: Aamir Bohra Date: Wed, 25 Mar 2020 15:31:12 +0530 Subject: soc/intel/{tgl,jsl}: Use soc/intel/jasperlake for Jasper Lake SoC Switch to using Jasper Lake SoC code from soc/intel/jasperlake and stop referring from soc/intel/tigerlake. Addtionally mainboard changes are done to support build. BUG=b:150217037 TEST=Build and boot waddledoo. Build jasperlake_rvp and volteer board. Change-Id: I39f117bd66cb610a305bcdb8ea65332fd0ff4814 Signed-off-by: Aamir Bohra Reviewed-on: https://review.coreboot.org/c/coreboot/+/39825 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Karthik Ramasubramanian --- src/mainboard/intel/jasperlake_rvp/dsdt.asl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/intel/jasperlake_rvp/dsdt.asl') diff --git a/src/mainboard/intel/jasperlake_rvp/dsdt.asl b/src/mainboard/intel/jasperlake_rvp/dsdt.asl index c996717b0e..ed59af6a96 100644 --- a/src/mainboard/intel/jasperlake_rvp/dsdt.asl +++ b/src/mainboard/intel/jasperlake_rvp/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( 0x20110725 /* OEM revision */ ) { - #include + #include /* global NVS and variables */ #include @@ -37,7 +37,7 @@ DefinitionBlock( Device (PCI0) { #include - #include + #include } } -- cgit v1.2.3