From 44e89af6e609874f2f18d30f1e66dce8b5a98eff Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 23 Feb 2019 19:24:51 +0100 Subject: soc/intel/skylake: Unify serial IRQ options We had two ways to configure the serial IRQ mode. One time in the devicetree for FSP and one time through Kconfig for coreboot. We'll use `enum serirq_mode` from soc/intel/common/ as a devicetree option instead. As the default is `quiet mode` here and that is the most common mode, this saves us a lot of lines. In four cases kblrvp8, 11 and librem 13v2, 15v3, we had conflicting settings in devicetree and Kconfig. We'll maintain the `continuous` selection, although it might be that coreboot overrode this earlier on the kblrvps. Note: A lot of Google boards have serial IRQ enabled, while the pin seems to be unconnected? Change-Id: I79f0cd302e335d8dcf8bf6bc32f3d40ca6713e5c Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/31596 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Matt DeVillier Reviewed-by: Furquan Shaikh --- src/mainboard/intel/kunimitsu/devicetree.cb | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/intel/kunimitsu') diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 4b720bf88b..ec1c11f1fb 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -60,8 +60,6 @@ chip soc/intel/skylake # SLP_A Minimum Assertion Width. Values 0: 0ms, 1: 4s, 2: 98ms, 3: 2s register "PmConfigSlpAMinAssert" = "0x03" - # Determines if enable Serial IRQ. Values 0: Disabled, 1: Enabled - register "SerialIrqConfigSirqEnable" = "0x01" # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ -- cgit v1.2.3