From 8c78d0a3c92e8fa1ad8517d1360ac9065e049234 Mon Sep 17 00:00:00 2001 From: Naresh G Solanki Date: Wed, 2 Dec 2015 20:02:07 +0530 Subject: intel/kunimitsu: Set I2C[4] port voltage to 1.8v As the audio card needs 1.8V I2C operation. This patch adds entry into devicetree.cb to set I2C port 4 operate at 1.8V. Branch=None Bug=chrome-os-partner:47821 Test=Built & booted kunimitsu board. Verified that I2C port 4 is operating at 1.8V level CQ-DEPEND=CL:*242225, CL:*241206, CL:315167 Change-Id: Ida69b885737aef0cfcf6a6ca21b3650169e614d9 Signed-off-by: Patrick Georgi Original-Commit-Id: 990df9c1c65e75aae0a1329ead3790e78021b804 Original-Change-Id: Ifbb65e3d83561b52cc18e48b89d146c2f88f289b Original-Signed-off-by: Naresh G Solanki Original-Reviewed-on: https://chromium-review.googlesource.com/315168 Original-Commit-Ready: Naresh Solanki Original-Tested-by: Robbie Zhang Original-Reviewed-by: Duncan Laurie Reviewed-on: https://review.coreboot.org/13010 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/intel/kunimitsu/devicetree.cb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/intel/kunimitsu') diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 75bb7c40f8..572dd43a83 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -149,6 +149,7 @@ chip soc/intel/skylake register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card) register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board) + register "SerialIoI2cVoltage[4]" = "1" # I2C4 is 1.8V # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ \ -- cgit v1.2.3