From 0c0b79689a804bff6cba25869d810812302ff9fc Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 22 Apr 2017 16:48:58 +0200 Subject: mb/intel/d510mo: Add romstage timestamps MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I324edce44ad82217ac1fba177f4a0bb3c799308c Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19426 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/mainboard/intel/d510mo/romstage.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c index 1bf2b61018..c6406e6f9f 100644 --- a/src/mainboard/intel/d510mo/romstage.c +++ b/src/mainboard/intel/d510mo/romstage.c @@ -33,6 +33,7 @@ #include #include #include +#include #define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) #define SUPERIO_DEV PNP_DEV(0x4e, 0) @@ -105,6 +106,9 @@ void mainboard_romstage_entry(unsigned long bist) int s3resume = 0; int boot_path; + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); + if (bist == 0) enable_lapic(); @@ -137,7 +141,9 @@ void mainboard_romstage_entry(unsigned long bist) } printk(BIOS_DEBUG, "Initializing memory\n"); + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(boot_path, spd_addrmap); + timestamp_add_now(TS_AFTER_INITRAM); printk(BIOS_DEBUG, "Memory initialized\n"); post_code(0x31); -- cgit v1.2.3