From 74834e075844e8f7c42635974ac873fddafd419b Mon Sep 17 00:00:00 2001
From: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Date: Sun, 4 Jan 2015 04:17:35 +1100
Subject: mainboard: Sanitize some superio include paths to be non-local
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This brings mainboard up to being consistent tree-wide now for
all superio header path inclusions.

Change-Id: I00a806ce209ba363c62e3ddd49db9bf599f32149
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8052
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
 src/mainboard/intel/cougar_canyon2/romstage.c | 2 +-
 src/mainboard/intel/emeraldlake2/romstage.c   | 2 +-
 src/mainboard/intel/mtarvon/romstage.c        | 2 +-
 src/mainboard/intel/truxton/romstage.c        | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/mainboard/intel')

diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c
index 6580ab9708..7194851634 100644
--- a/src/mainboard/intel/cougar_canyon2/romstage.c
+++ b/src/mainboard/intel/cougar_canyon2/romstage.c
@@ -33,7 +33,7 @@
 #include <console/console.h>
 #include <halt.h>
 #include <reset.h>
-#include "superio/smsc/sio1007/chip.h"
+#include <superio/smsc/sio1007/chip.h>
 #include <fsp_util.h>
 #include "northbridge/intel/fsp_sandybridge/northbridge.h"
 #include "northbridge/intel/fsp_sandybridge/raminit.h"
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 76edf7fd0d..ffb44a0423 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -30,7 +30,7 @@
 #include <arch/acpi.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include "superio/smsc/sio1007/chip.h"
+#include <superio/smsc/sio1007/chip.h>
 #include "northbridge/intel/sandybridge/sandybridge.h"
 #include "northbridge/intel/sandybridge/raminit.h"
 #include "southbridge/intel/bd82x6x/pch.h"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index c1ee9bb058..4691b5c0e8 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -29,7 +29,7 @@
 #include "southbridge/intel/i3100/early_smbus.c"
 #include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit.h"
-#include "superio/intel/i3100/i3100.h"
+#include <superio/intel/i3100/i3100.h>
 #include "superio/intel/i3100/early_serial.c"
 #include "northbridge/intel/i3100/memory_initialized.c"
 #include "cpu/x86/bist.h"
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 0677cf6940..f75077833c 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -30,7 +30,7 @@
 #include "southbridge/intel/i3100/early_smbus.c"
 #include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit_ep80579.h"
-#include "superio/intel/i3100/i3100.h"
+#include <superio/intel/i3100/i3100.h>
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "superio/intel/i3100/early_serial.c"
 #include "lib/debug.c" // XXX
-- 
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