From aa969e887af6c76c0d5e694a3a17e14ee13d27b2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 25 Jan 2021 17:05:35 +0200 Subject: ACPI: Move PICM declaration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Variable PICM was not inside GNVS region and can use a static initialisation value. For most AMD platforms PICM default changes from 1 to 0. Fix comments about PICM==0 used to indicate use of i8259 PIC for interrupt delivery. Change-Id: I525ef8353514ec32941c4d0c37cab38aa320cb20 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49905 Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/intel/cedarisland_crb/acpi/platform.asl | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/intel') diff --git a/src/mainboard/intel/cedarisland_crb/acpi/platform.asl b/src/mainboard/intel/cedarisland_crb/acpi/platform.asl index 964959265f..6ac38dd937 100644 --- a/src/mainboard/intel/cedarisland_crb/acpi/platform.asl +++ b/src/mainboard/intel/cedarisland_crb/acpi/platform.asl @@ -19,8 +19,6 @@ Field (POST, ByteAcc, Lock, Preserve) Name(\APC1, Zero) // IIO IOAPIC -Name(\PICM, Zero) // IOAPIC/8259 - Method(_PIC, 1) { Store(Arg0, PICM) -- cgit v1.2.3