From b426107d1db17b606a90be83ddd3bf8a1c0d8751 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 22 Jul 2014 10:24:20 +0300 Subject: AGESA f14 f15tn 16kb: Move IOAPIC ID setup out of get_bus_conf() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I7fd14c17242cd3deb7a784fc918ad6fe1191bd13 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6359 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Edward O'Callaghan --- src/mainboard/jetway/nf81-t56n-lf/mptable.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) (limited to 'src/mainboard/jetway/nf81-t56n-lf/mptable.c') diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c index b621dd200b..4390605e0d 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c +++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c @@ -33,14 +33,20 @@ #include #include -extern u32 apicid_sb800; -extern u32 apicver_sb800; static void *smp_write_config_table(void *v) { struct mp_config_table *mc; int bus_isa; + /* + * By the time this function gets called, the IOAPIC registers + * have been written so they can be read to get the correct + * APIC ID and Version + */ + u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); + u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); + /* Intialize the MP_Table */ mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -64,20 +70,20 @@ static void *smp_write_config_table(void *v) * Type 2: I/O APICs: * APIC ID, Version, APIC Flags:EN, Address */ - smp_write_ioapic(mc, apicid_sb800, apicver_sb800, IO_APIC_ADDR); + smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR); /* * Type 3: I/O Interrupt Table Entries: * Int Type, Int Polarity, Int Level, Source Bus ID, * Source Bus IRQ, Dest APIC ID, Dest PIN# */ - mptable_add_isa_interrupts(mc, bus_isa, apicid_sb800, 0); + mptable_add_isa_interrupts(mc, bus_isa, ioapic_id, 0); /* PCI interrupts are level triggered, and are * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), apicid_sb800, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin)) /* APU Internal Graphic Device */ PCI_INT(0x0, 0x01, 0x0, intr_data_ptr[PIRQ_C]); -- cgit v1.2.3