From 6f55154cd75f67f8d7a737d36125353ce664fe30 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 10 Sep 2017 07:27:08 +0300 Subject: AGESA CIMX: Remove empty set_pcie_(de)reset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For boards with cimx/sb800, mainboards defined only empty stubs. Reset functionality is handled as BiosCallout. For amd/inagua, the defined function was actually initial GPIO programming. For cimx/sb700, function had prototypes but no callers. For cimx/sb900, everything was commented out already. Change-Id: I936feb4fc41d903078620c919a733bb9f39c3efb Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21477 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/mainboard/jetway/nf81-t56n-lf/mainboard.c | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'src/mainboard/jetway/nf81-t56n-lf') diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c index 4b22afe088..54c83b49c4 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c +++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c @@ -26,9 +26,6 @@ #include #include -void set_pcie_reset(void); -void set_pcie_dereset(void); - /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. * This table is responsible for physically routing the PIC and @@ -123,23 +120,6 @@ static void pirq_setup(void) picr_data_ptr = mainboard_picr_data; } -/** - * TODO - * SB CIMx callback - */ -void set_pcie_reset(void) -{ -} - -/** - * TODO - * mainboard specific SB CIMx callback - */ -void set_pcie_dereset(void) -{ -} - - /********************************************** * Enable the dedicated functions of the board. **********************************************/ -- cgit v1.2.3