From e453b9a91134eb56bf8076d72d0b89a044093753 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 25 Nov 2014 14:03:29 +0200 Subject: AGESA fam14: Move agesawrapper_amdinitmmio() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enabling MMCONF PCI-e configuration access should be done before console_init(). This will likely move further to bootblock one day. Change-Id: I20c93fe6e79ef7e7981b2f1cd3c6b446feea0f4e Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/7163 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/mainboard/jetway/nf81-t56n-lf/romstage.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/mainboard/jetway/nf81-t56n-lf') diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c index 534bdc44bf..d7fa6bcfcb 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c +++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c @@ -76,6 +76,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */ __writemsr (0xc0010062, 0); + agesawrapper_amdinitmmio(); + if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); sb_Poweron_Init(); @@ -94,9 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val); printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx); - post_code(0x35); - agesawrapper_amdinitmmio(); - post_code(0x37); agesawrapper_amdinitreset(); -- cgit v1.2.3