From 421b47e05059d3dbcd2ed06be60f574fdbe69b15 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 17 Oct 2015 13:16:27 +0200 Subject: SB800-mainboards: use write8 to disable unused GPP CLK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit don't use non-volatile pointers for MMIO access Change-Id: I9f38012a806e43f2535265f1d25537c59b53904e Signed-off-by: Felix Held Reviewed-on: http://review.coreboot.org/12081 Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Paul Menzel --- src/mainboard/jetway/nf81-t56n-lf/mainboard.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/mainboard/jetway') diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c index 9f6cf78181..e64fce00cc 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c +++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c @@ -160,11 +160,11 @@ static void mainboard_enable(device_t dev) /* enable GPP CLK0 thru CLK3 (interleaved) */ /* disable GPP CLK4 thru SLT_GFX_CLK */ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); - *(misc_mem_clk_cntrl + 0) = 0xFF; - *(misc_mem_clk_cntrl + 1) = 0xFF; - *(misc_mem_clk_cntrl + 2) = 0x00; - *(misc_mem_clk_cntrl + 3) = 0x00; - *(misc_mem_clk_cntrl + 4) = 0x00; + write8(misc_mem_clk_cntrl + 0, 0xFF); + write8(misc_mem_clk_cntrl + 1, 0xFF); + write8(misc_mem_clk_cntrl + 2, 0x00); + write8(misc_mem_clk_cntrl + 3, 0x00); + write8(misc_mem_clk_cntrl + 4, 0x00); /* * Initialize ASF registers to an arbitrary address because someone -- cgit v1.2.3