From b0ae42b5bb7fe7c9f6e8301bff8fbabe95294c62 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 23 Jun 2020 02:50:00 +0300 Subject: AGESA fam14: Use AMD_ACPIMMIO_GPIO_BASE_100 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the pre-defined constant address directly. Change-Id: I29fbc82fffc69b864adb4ddbda1425db98e2e48a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/42708 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Furquan Shaikh --- src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'src/mainboard/jetway') diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c index 6e0f1ad969..2129509d55 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c @@ -43,20 +43,12 @@ static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *Confi PCIe_SLOT_RESET_INFO *ResetInfo; uint32_t GpioMmioAddr; - uint32_t AcpiMmioAddr; uint8_t Data8; - uint16_t Data16; FcnData = Data; ResetInfo = ConfigPtr; - /* Get SB800 MMIO Base (AcpiMmioAddr) */ - Data8 = pm_io_read8(0x27); - Data16 = Data8 << 8; - Data8 = pm_io_read8(0x26); - Data16 |= Data8; - AcpiMmioAddr = (uint32_t)Data16 << 16; Status = AGESA_UNSUPPORTED; - GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; + GpioMmioAddr = ACPIMMIO_GPIO_BASE_100; switch (ResetInfo->ResetId) { case 46: /* GPIO50 = SBGPIO_PCIE_RST# affects LAN0, LAN1, PCIe slot */ -- cgit v1.2.3