From 2a1847ea125b4b867f435635173acb39c9d75292 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 17 Jun 2016 19:06:25 +0200 Subject: lenovo/x200,t400: enable C4 cpu low power state This enables the C4 low power state on the lenovo x200 and t400. It's inspired by the thread on the mailinglist: "[coreboot] Lenovo X200 running Coreboot drains 3-4W more power than with Vendor BIOS". What this does, is to enable a C3 state using MWAIT(C3) request and set the southbridge config c4onc3_enable to automatically upgrade C3 to the lower power C4 state. The latency (0x37) is the same value used by the vendor bios. With C4 enabled the idle power consumption is about ~2-3W lower. TEST= build and install on target. Use powertop top to measure power usage. To manually disable c-state to compare them, do (tested on linux 4.4): echo 1 > /sys/devices/system/cpu/cpu*/cpuidle/stateX/disable Change-Id: I1a1663a7662ebc7157a965667680688ad6a33545 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/15251 Tested-by: build bot (Jenkins) Reviewed-by: Swift Geek Reviewed-by: Paul Menzel Reviewed-by: Nico Huber --- src/mainboard/lenovo/t400/cstates.c | 5 +++++ src/mainboard/lenovo/t400/devicetree.cb | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'src/mainboard/lenovo/t400') diff --git a/src/mainboard/lenovo/t400/cstates.c b/src/mainboard/lenovo/t400/cstates.c index 3ce2ed1a81..175153ebd4 100644 --- a/src/mainboard/lenovo/t400/cstates.c +++ b/src/mainboard/lenovo/t400/cstates.c @@ -28,6 +28,11 @@ static acpi_cstate_t cst_entries[] = { 2, 0x01, 500, { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x10, 0 } }, + { + /* acpi C3 / cpu C3 */ + 3, 0x37, 250, + { ACPI_ADDRESS_SPACE_FIXED, 1, 2, { 1 }, 0x20, 0 } + }, }; int get_cst_entries(acpi_cstate_t **entries) diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 43a610ab5f..6bf25fab38 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -63,7 +63,7 @@ chip northbridge/intel/gm45 register "sata_traffic_monitor" = "0" # Set c-state support - register "c4onc3_enable" = "0" + register "c4onc3_enable" = "1" register "c5_enable" = "1" register "c6_enable" = "1" -- cgit v1.2.3