From b3f2323e84a8ed47f9cd6aa4d2b885d58da58d97 Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Mon, 21 Jan 2019 17:48:55 +0100
Subject: mb/*/*/devicetree.cb: Make sandybridge devicetree uniform

This is a merely cosmetic change.

Change-Id: If36419fbee9628b591116604bf32fe00a4f08c17
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/31030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
---
 src/mainboard/lenovo/t530/variants/t530/devicetree.cb | 2 +-
 src/mainboard/lenovo/t530/variants/w530/devicetree.cb | 6 ++----
 2 files changed, 3 insertions(+), 5 deletions(-)

(limited to 'src/mainboard/lenovo/t530')

diff --git a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb
index 4dcdc9d9d5..4114b3848c 100644
--- a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb
@@ -24,7 +24,7 @@ chip northbridge/intel/sandybridge
 		end
 		chip cpu/intel/model_206ax
 			# Magic APIC ID to locate this chip
-			device lapic 0xACAC off end
+			device lapic 0xacac off end
 
 			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
 			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
diff --git a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
index 7a72b26213..85add34496 100644
--- a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb
@@ -23,8 +23,7 @@ chip northbridge/intel/sandybridge
 
 	device cpu_cluster 0x0 on
 		chip cpu/intel/socket_rPGA989
-			device lapic 0x0 on
-			end
+			device lapic 0x0 on end
 		end
 		chip cpu/intel/model_206ax # FIXME: check all registers
 			register "c1_acpower" = "1"
@@ -33,8 +32,7 @@ chip northbridge/intel/sandybridge
 			register "c2_battery" = "3"
 			register "c3_acpower" = "5"
 			register "c3_battery" = "5"
-			device lapic 0xacac off
-			end
+			device lapic 0xacac off end
 		end
 	end
 
-- 
cgit v1.2.3