From 7afcfe0f9f78ef8d5029e90304a34caf07d14588 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 19 May 2016 15:34:49 +0200 Subject: gm45: enable setting all vram sizes from cmos Setting the size of the preallocated memory for the igd is done using a cmos parameter, gfx_uma_size. This was limited to a subset of all available sizes, that were already implemented elsewhere in the northbridge code. What this does is change the cmos parameter to 4 bits instead of 3 bits to accomodate all vram sizes. It also adds a sane default of 32mb that already was in place. The northbridge code that reads this cmos parameter is also changed for this new cmos settings. 352M is disabled since it causes issues on systems with 4GB or more ram. TEST: Build, flash target. Clear cmos by corrupting the checksum (nvramtool -c something). Set a desired value in gfx_uma_size using nvramtool. "dmesg | grep stolen" to see what is actually allocated. Change-Id: Ia6479d03f1abe6d0c94bd7264365505e8f8eaeec Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/14900 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/mainboard/lenovo/x200/cmos.default | 1 + src/mainboard/lenovo/x200/cmos.layout | 21 +++++++++++++-------- 2 files changed, 14 insertions(+), 8 deletions(-) (limited to 'src/mainboard/lenovo/x200') diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default index ac9f96d73c..1d7b420b5a 100644 --- a/src/mainboard/lenovo/x200/cmos.default +++ b/src/mainboard/lenovo/x200/cmos.default @@ -13,3 +13,4 @@ sticky_fn=Disable power_management_beeps=Enable low_battery_beep=Enable sata_mode=AHCI +gfx_uma_size=32M \ No newline at end of file diff --git a/src/mainboard/lenovo/x200/cmos.layout b/src/mainboard/lenovo/x200/cmos.layout index 931cb4a52a..a00d703fe6 100644 --- a/src/mainboard/lenovo/x200/cmos.layout +++ b/src/mainboard/lenovo/x200/cmos.layout @@ -77,9 +77,8 @@ entries 940 1 e 1 uwb # coreboot config options: northbridge -941 3 e 11 gfx_uma_size - 944 8 h 0 volume +952 4 e 11 gfx_uma_size # coreboot config options: check sums 984 16 h 0 check_sum @@ -125,12 +124,18 @@ enumerations 9 1 Primary 10 0 AHCI 10 1 Compatible -11 0 32M -11 1 48M -11 2 64M -11 3 128M -11 5 96M -11 6 160M +11 0 1M +11 1 4M +11 2 8M +11 3 16M +11 4 32M +11 5 48M +11 6 64M +11 7 128M +11 8 256M +11 9 96M +11 10 160M +11 11 224M # ----------------------------------------------------------------- checksums -- cgit v1.2.3