From 9cb2da45d8240de73b2a8677f9874ca947d03c11 Mon Sep 17 00:00:00 2001 From: Bill XIE Date: Fri, 2 Nov 2018 19:24:42 +0800 Subject: mb/lenovo/x220: Add x1 as a variant ThinkPad X1 ( https://www.thinkwiki.org/wiki/Category:X1 ) is nearly a clone of X220, with additional USB3 controller on pci-e (as i7 variant of x220), and a powered ESATA port wired to ata4 (Linux' annotation). Documentation added. Tested: - CPU i5-2520M - Slotted DIMM 8GiB - Camera - Mini pci-e on wlan slot - Msata on wwan slot - On board SDHCI connected to pci-e - USB3 controller connected to pci-e - NVRAM options for North and South bridges - S3 - TPM1 on LPC - Linux 4.9.110-3 within Debian GNU/Linux stable, loaded from SeaBIOS, or Linux payload (Heads) Not tested: - Fingerprint reader on USB2 - Onboard USB2 interfaces (wlan slot, wwan slot) Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1 Signed-off-by: Bill XIE Reviewed-on: https://review.coreboot.org/c/29434 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/lenovo/x220/romstage.c | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'src/mainboard/lenovo/x220/romstage.c') diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c index 3429aad6b6..62b887e688 100644 --- a/src/mainboard/lenovo/x220/romstage.c +++ b/src/mainboard/lenovo/x220/romstage.c @@ -98,23 +98,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) *pei_data = pei_data_template; } -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 0, 0 }, - { 1, 1, 1 }, - { 1, 1, 3 }, - { 1, 1, 3 }, - { 1, 1, -1 }, - { 1, 1, -1 }, - { 1, 0, 2 }, - { 1, 0, 2 }, - { 1, 1, 6 }, - { 1, 1, 5 }, - { 1, 1, 6 }, - { 1, 1, 6 }, - { 1, 1, 7 }, - { 1, 1, 6 }, -}; - void mainboard_get_spd(spd_raw_data *spd, bool id_only) { read_spd (&spd[0], 0x50, id_only); -- cgit v1.2.3