From 0c152cf1bbc3673d80f255fcc102d5784e0974c1 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Tue, 5 Feb 2019 08:24:00 +0100
Subject: src: Remove unused include device/pnp_def.h
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Change-Id: Ibb7ce42588510dc5ffb04c950c4c8c64e9a2fa37
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
 src/mainboard/lenovo/l520/romstage.c            | 1 -
 src/mainboard/lenovo/s230u/romstage.c           | 1 -
 src/mainboard/lenovo/thinkcentre_a58/romstage.c | 1 -
 src/mainboard/lenovo/x1_carbon_gen1/romstage.c  | 1 -
 src/mainboard/lenovo/x201/romstage.c            | 1 -
 src/mainboard/lenovo/x220/romstage.c            | 1 -
 src/mainboard/lenovo/x230/romstage.c            | 1 -
 7 files changed, 7 deletions(-)

(limited to 'src/mainboard/lenovo')

diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c
index 9bfe54aacb..d9e021b408 100644
--- a/src/mainboard/lenovo/l520/romstage.c
+++ b/src/mainboard/lenovo/l520/romstage.c
@@ -17,7 +17,6 @@
 
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c
index 207333de81..beeb96dc8d 100644
--- a/src/mainboard/lenovo/s230u/romstage.c
+++ b/src/mainboard/lenovo/s230u/romstage.c
@@ -19,7 +19,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/lenovo/thinkcentre_a58/romstage.c b/src/mainboard/lenovo/thinkcentre_a58/romstage.c
index b3bd2ed01b..cac09d104c 100644
--- a/src/mainboard/lenovo/thinkcentre_a58/romstage.c
+++ b/src/mainboard/lenovo/thinkcentre_a58/romstage.c
@@ -23,7 +23,6 @@
 #include <cpu/intel/romstage.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
 #include <northbridge/intel/x4x/iomap.h>
-#include <device/pnp_def.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
index e996974c36..7f6181b3f4 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
@@ -22,7 +22,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <console/console.h>
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 5e9937f29f..329f8d7c7b 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -22,7 +22,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <lib.h>
 #include <romstage_handoff.h>
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index 62b887e688..2d6c2a78f3 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -21,7 +21,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index daf6aa33f9..ba8baa88ec 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -21,7 +21,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
-- 
cgit v1.2.3