From 45f448f4a4e09b270d964c98d3aced2e73d9d6bc Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 3 Jul 2020 14:46:47 +0200 Subject: haswell: Relocate `mainboard_romstage_entry` to northbridge This is what sandybridge does, and if done properly allows factoring out common settings. Said refactoring will be handled in subsequent commits. Change-Id: I075eba1324a9e7cbd47e776b097eb940102ef4fe Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43108 Tested-by: build bot (Jenkins) Reviewed-by: Tristan Corrick --- src/mainboard/lenovo/t440p/romstage.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mainboard/lenovo') diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c index 0943f1d9ac..050d465358 100644 --- a/src/mainboard/lenovo/t440p/romstage.c +++ b/src/mainboard/lenovo/t440p/romstage.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include #include #include #include +#include #include #include #include @@ -43,9 +43,9 @@ void mb_late_romstage_setup(void) } } -void mainboard_romstage_entry(void) +void mainboard_fill_pei_data(struct pei_data *pei_data) { - struct pei_data pei_data = { + struct pei_data mainboard_pei_data = { .pei_version = PEI_VERSION, .mchbar = (uintptr_t)DEFAULT_MCHBAR, .dmibar = (uintptr_t)DEFAULT_DMIBAR, @@ -92,5 +92,5 @@ void mainboard_romstage_entry(void) }, }; - romstage_common(&pei_data); + *pei_data = mainboard_pei_data; /* FIXME: Do not overwrite everything */ } -- cgit v1.2.3