From af258cc1791b5c46fcb13d41128cc99043a435be Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Sun, 1 Dec 2019 17:42:04 +0100 Subject: mb/*/*: use ACPIMMIO common block wherever possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TEST=boot PC Engines apu2 and launch Debian Linux Signed-off-by: Michał Żygowski Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/lippert/frontrunner-af/mainboard.c | 68 ++++++++++++++---------- 1 file changed, 39 insertions(+), 29 deletions(-) (limited to 'src/mainboard/lippert/frontrunner-af') diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 6ad5234d81..9e3eab7a6c 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -59,32 +59,41 @@ static const u16 sio_init_table[] = { // hi = offset, lo = value static void init(struct device *dev) { - volatile u8 *spi_base; // base addr of Hudson's SPI host controller + volatile u8 *spi_base; /* base addr of Hudson's SPI host controller */ int i; printk(BIOS_DEBUG, CONFIG_MAINBOARD_PART_NUMBER " ENTER %s\n", __func__); /* Init Hudson GPIOs. */ printk(BIOS_DEBUG, "Init FCH GPIOs @ 0x%08x\n", ACPI_MMIO_BASE+GPIO_BASE); - FCH_IOMUX(50) = 2; // GPIO50: FCH_ARST#_GATE resets stuck PCIe devices - FCH_GPIO (50) = 0xC0; // = output set to 1 as it's never needed - FCH_IOMUX(197) = 2; // GPIO197: BIOS_DEFAULTS# = input (int. PU) - FCH_IOMUX(56) = 1; // GPIO58-56: REV_ID2-0 - FCH_GPIO (56) = 0x28; // = inputs, disable int. pull-ups - FCH_IOMUX(57) = 1; - FCH_GPIO (57) = 0x28; - FCH_IOMUX(58) = 1; - FCH_GPIO (58) = 0x28; - FCH_IOMUX(96) = 1; // "Gpio96": GEVENT0# signal on X2 connector (int. PU) - FCH_IOMUX(52) = 1; // GPIO52,61,62,187-192 free to use on X2 connector - FCH_IOMUX(61) = 2; // default to inputs with int. PU - FCH_IOMUX(62) = 2; - FCH_IOMUX(187) = 2; - FCH_IOMUX(188) = 2; - FCH_IOMUX(189) = 1; - FCH_IOMUX(190) = 1; - FCH_IOMUX(191) = 1; - FCH_IOMUX(192) = 1; - if (!fch_gpio_state(197)) // just in case anyone cares + /* GPIO50: FCH_ARST#_GATE resets stuck PCIe devices */ + iomux_write8(50, 2); + /* output set to 1 as it's never needed */ + iomux_write8(50, 0xc0); + /* GPIO197: BIOS_DEFAULTS# = input (int. PU) */ + iomux_write8(197, 2); + /* GPIO58-56: REV_ID2-0 */ + iomux_write8(56, 1); + /* inputs, disable int. pull-ups */ + gpio_100_write8(56, 0x28); + iomux_write8(57, 1); + gpio_100_write8(57, 0x28); + iomux_write8(58, 1); + gpio_100_write8(58, 0x28); + /* "Gpio96": GEVENT0# signal on X2 connector (int. PU) */ + iomux_write8(96, 1); + /* GPIO52,61,62,187-192 free to use on X2 connector */ + iomux_write8(52, 1); + /* default to inputs with int. PU */ + iomux_write8(61, 2); + iomux_write8(62, 2); + iomux_write8(187, 2); + iomux_write8(188, 2); + iomux_write8(189, 1); + iomux_write8(190, 1); + iomux_write8(191, 1); + iomux_write8(192, 1); + /* just in case anyone cares */ + if (!fch_gpio_state(197)) printk(BIOS_INFO, "BIOS_DEFAULTS jumper is present.\n"); printk(BIOS_INFO, "Board revision ID: %u\n", fch_gpio_state(58)<<2 | fch_gpio_state(57)<<1 | fch_gpio_state(56)); @@ -99,9 +108,11 @@ static void init(struct device *dev) /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ spi_base = (u8 *)((uintptr_t)pci_read_config32(pcidev_on_root(0x14, 3), 0xA0) & 0xFFFFFFE0); - spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register + /* NormSpeed in SPI_Cntrl1 register */ + spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; - /* Notify the SMC we're alive and kicking, or after a while it will + /* + * Notify the SMC we're alive and kicking, or after a while it will * effect a power cycle and switch to the alternate BIOS chip. * Should be done as late as possible. * Failure here does not matter if watchdog was already disabled, @@ -122,12 +133,11 @@ static void mainboard_enable(struct device *dev) /* enable GPP CLK0 */ /* disable GPP CLK1 thru SLT_GFX_CLK */ - u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); - write8(misc_mem_clk_cntrl + 0, 0x0F); - write8(misc_mem_clk_cntrl + 1, 0x00); - write8(misc_mem_clk_cntrl + 2, 0x00); - write8(misc_mem_clk_cntrl + 3, 0x00); - write8(misc_mem_clk_cntrl + 4, 0x00); + misc_write8(0, 0x0f); + misc_write8(1, 0); + misc_write8(2, 0); + misc_write8(3, 0); + misc_write8(4, 0); /* * Initialize ASF registers to an arbitrary address because someone -- cgit v1.2.3