From c70eed1e6202c928803f3e7f79161cd247a62b23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Tue, 22 May 2018 02:18:00 +0300 Subject: device: Use pcidev_on_root() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc Signed-off-by: Kyösti Mälkki Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/26484 Tested-by: build bot (Jenkins) Reviewed-by: Piotr Król Reviewed-by: Arthur Heymans --- src/mainboard/lippert/frontrunner-af/mainboard.c | 3 ++- src/mainboard/lippert/frontrunner-af/mptable.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'src/mainboard/lippert/frontrunner-af') diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index cc25957dd1..9660a73ed5 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -97,7 +97,8 @@ static void init(struct device *dev) } /* Lower SPI speed from default 66 to 22 MHz for SST 25VF032B */ - spi_base = (u8*)((uintptr_t)pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x14, 3)), 0xA0) & 0xFFFFFFE0); + spi_base = (u8 *)((uintptr_t)pci_read_config32(pcidev_on_root(0x14, 3), + 0xA0) & 0xFFFFFFE0); spi_base[0x0D] = (spi_base[0x0D] & ~0x30) | 0x20; // NormSpeed in SPI_Cntrl1 register /* Notify the SMC we're alive and kicking, or after a while it will diff --git a/src/mainboard/lippert/frontrunner-af/mptable.c b/src/mainboard/lippert/frontrunner-af/mptable.c index 26d22cd2e5..5e3a9508cb 100644 --- a/src/mainboard/lippert/frontrunner-af/mptable.c +++ b/src/mainboard/lippert/frontrunner-af/mptable.c @@ -97,7 +97,7 @@ static void *smp_write_config_table(void *v) /* on board NIC & Slot PCIE. */ /* PCI slots */ - struct device *dev = dev_find_slot(0, PCI_DEVFN(0x14, 4)); + struct device *dev = pcidev_on_root(0x14, 4); if (dev && dev->enabled) { u8 bus_pci = dev->link_list->secondary; /* PCI_SLOT 0. */ -- cgit v1.2.3