From d28d5071906e15c88939d889fbe40b117f5c303b Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 16 Jun 2019 23:36:28 +0200 Subject: sb/intel/bd82x6x/lpc: Set up default LPC decode ranges This sets up some common default LPC decode ranges in a common place. This may set up more decode ranges than needed but that typically does not hurt. Mainboards needing additional ranges can do so in the mainboard pch_enable_lpc hook. Change-Id: Ifeb5a862e56f415aa847d0118a33a31537ab8037 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/33549 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/msi/ms7707/romstage.c | 5 ----- 1 file changed, 5 deletions(-) (limited to 'src/mainboard/msi/ms7707/romstage.c') diff --git a/src/mainboard/msi/ms7707/romstage.c b/src/mainboard/msi/ms7707/romstage.c index 30bb545328..dc3b79d527 100644 --- a/src/mainboard/msi/ms7707/romstage.c +++ b/src/mainboard/msi/ms7707/romstage.c @@ -23,11 +23,6 @@ void pch_enable_lpc(void) { - /* IO Decode Ranges Register */ - pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000); - /* LPC IF Enables Register (CNF2_LPC_EN|KBC_LPC_EN) */ - pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x2400); - u16 reg16; reg16 = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0xa4); reg16 |= (1 << 13); // WOL Enable Override (WOL_EN_OVRD) -- cgit v1.2.3