From fb2f667da2091ce2194274f95c2d5db024d46e63 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 28 Mar 2017 11:50:10 +0200 Subject: nb/amd/amdk8: Link raminit_f.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For this debug.c needs to be linked too. Change-Id: I9cd1ffff2c39021693fe1d5d3f90ec5f70891f57 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19030 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/msi/ms7135/romstage.c | 8 ++++---- src/mainboard/msi/ms7260/romstage.c | 9 ++++----- src/mainboard/msi/ms9185/romstage.c | 9 ++++----- src/mainboard/msi/ms9282/romstage.c | 9 ++++----- 4 files changed, 16 insertions(+), 19 deletions(-) (limited to 'src/mainboard/msi') diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index 25c4a403ef..1da2ff4d3c 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -35,7 +35,7 @@ #include #include #include -#include "northbridge/amd/amdk8/debug.c" + #include #include "northbridge/amd/amdk8/setup_resource_map.c" #include "northbridge/amd/amdk8/coherent_ht.c" @@ -49,10 +49,10 @@ #define SERIAL_DEV PNP_DEV(0x4e, W83627THG_SP1) -static void memreset(int controllers, const struct mem_controller *ctrl) { } -static void activate_spd_rom(const struct mem_controller *ctrl) { } +void memreset(int controllers, const struct mem_controller *ctrl) { } +void activate_spd_rom(const struct mem_controller *ctrl) { } -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index d1c50df33f..35c8943676 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -36,7 +36,7 @@ #include #include #include -#include "northbridge/amd/amdk8/debug.c" + #include "northbridge/amd/amdk8/setup_resource_map.c" #define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1) @@ -54,10 +54,10 @@ unsigned get_sbdn(unsigned bus) return (dev >> 15) & 0x1f; } -static void memreset(int controllers, const struct mem_controller *ctrl) {} -static inline void activate_spd_rom(const struct mem_controller *ctrl) {} +void memreset(int controllers, const struct mem_controller *ctrl) {} +void activate_spd_rom(const struct mem_controller *ctrl) {} -static inline int spd_read_byte(unsigned int device, unsigned int address) +int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); } @@ -66,7 +66,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index db5242926a..141c7e0fd3 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -35,7 +35,7 @@ #include #include #include "northbridge/amd/amdk8/reset_test.c" -#include "northbridge/amd/amdk8/debug.c" + #include #include #include "northbridge/amd/amdk8/setup_resource_map.c" @@ -45,9 +45,9 @@ unsigned get_sbdn(unsigned bus); -static void memreset(int controllers, const struct mem_controller *ctrl) { } +void memreset(int controllers, const struct mem_controller *ctrl) { } -static inline void activate_spd_rom(const struct mem_controller *ctrl) +void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_SWITCH1 0x70 #define SMBUS_SWITCH2 0x72 @@ -56,7 +56,7 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl) smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f ); } -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } @@ -65,7 +65,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 463a7679d0..afb82eba72 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -32,7 +32,7 @@ #include #include #include "northbridge/amd/amdk8/reset_test.c" -#include "northbridge/amd/amdk8/debug.c" + #include #include #include @@ -55,9 +55,9 @@ unsigned get_sbdn(unsigned bus) return (dev >> 15) & 0x1f; } -static void memreset(int controllers, const struct mem_controller *ctrl) { } +void memreset(int controllers, const struct mem_controller *ctrl) { } -static inline void activate_spd_rom(const struct mem_controller *ctrl) +void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_SWITCH1 0x70 #define SMBUS_SWITCH2 0x72 @@ -66,7 +66,7 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl) smbus_send_byte(SMBUS_SWITCH2, (device >> 4) & 0x0f); } -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } @@ -75,7 +75,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "northbridge/amd/amdk8/raminit_f.c" #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -- cgit v1.2.3