From 018d8dd60f2cc0c82faac0ee2657daa163dd43e7 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Thu, 4 Nov 2004 11:04:33 +0000 Subject: - Update abuild.sh so it will rebuild successfull builds - Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/newisys/khepri/auto.c | 47 +++++++++++++++++++++++-------------- 1 file changed, 30 insertions(+), 17 deletions(-) (limited to 'src/mainboard/newisys/khepri/auto.c') diff --git a/src/mainboard/newisys/khepri/auto.c b/src/mainboard/newisys/khepri/auto.c index 6e6dec743f..1aa151f906 100644 --- a/src/mainboard/newisys/khepri/auto.c +++ b/src/mainboard/newisys/khepri/auto.c @@ -1,4 +1,6 @@ #define ASSEMBLY 1 +#undef MAXIMUM_CONSOLE_LOGLEVEL +#undef DEFAULT_CONSOLE_LOGLEVEL #define MAXIMUM_CONSOLE_LOGLEVEL 9 #define DEFAULT_CONSOLE_LOGLEVEL 9 @@ -7,7 +9,8 @@ #include #include #include -#include +#include +#include #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" @@ -16,13 +19,15 @@ #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" -#include "cpu/k8/apic_timer.c" +#include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/cpu_rev.c" #include "superio/NSC/pc87360/pc87360_early_serial.c" +#include "cpu/amd/mtrr/amd_earlymtrr.c" +#include "cpu/x86/bist.h" #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1) @@ -126,14 +131,11 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "sdram/generic_sdram.c" -#include "resourcemap.c" /* newisys khepri does not want the default */ +/* newisys khepri does not want the default */ +#include "resourcemap.c" -static void main(void) +static void main(unsigned long bist) { - /* - * GPIO28 of 8111 will control H0_MEMRESET_L - * GPIO29 of 8111 will control H1_MEMRESET_L - */ static const struct mem_controller cpu[] = { { .node_id = 0, @@ -154,19 +156,30 @@ static void main(void) .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 }, }, }; + int needs_reset; - enable_lapic(); - init_timer(); - if (cpu_init_detected()) { - asm("jmp __cpu_reset"); - } - distinguish_cpu_resets(); - if (!boot_cpu()) { - stop_this_cpu(); + if (bist == 0) { + /* Skip this if there was a built in self test failure */ + amd_early_mtrr_init(); + enable_lapic(); + init_timer(); + /* Has this cpu already booted? */ + if (cpu_init_detected()) { + asm volatile ("jmp __cpu_reset"); + } + distinguish_cpu_resets(); + if (!boot_cpu()) { + stop_this_cpu(); + } } + /* Setup the console */ pc87360_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); + setup_khepri_resource_map(); needs_reset = setup_coherent_ht_domain(); needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80); -- cgit v1.2.3