From 8abd7072f6c3aa47162ef26707ca2a8e227b070c Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Fri, 23 Jun 2017 19:42:19 -0700 Subject: mainboard/ocp/monolake: Initial commit This patch does the following: 1. Copies mainboard/intel/camelback_fsp to mainboard/ocp/monolake 2. Adds Kconfig files to mainboard/ocp 3. Makes minor board-specific changes (board_info.txt, Kconfig variables) The OCP Mono Lake platform consists of up to 4 single-socket Xeon D-1500 microservers in a Yosemite v1 chassis. More info is available at http://www.opencompute.org/wiki/Server/SpecsAndDesigns. Signed-off-by: David Hendricks Change-Id: If358162abe67e9411fd2514d48f3b3411da15f68 Reviewed-on: https://review.coreboot.org/25669 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese --- src/mainboard/ocp/monolake/irqroute.h | 48 +++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 src/mainboard/ocp/monolake/irqroute.h (limited to 'src/mainboard/ocp/monolake/irqroute.h') diff --git a/src/mainboard/ocp/monolake/irqroute.h b/src/mainboard/ocp/monolake/irqroute.h new file mode 100644 index 0000000000..c3911be75b --- /dev/null +++ b/src/mainboard/ocp/monolake/irqroute.h @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * Copyright (C) 2015-2016 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef IRQROUTE_H +#define IRQROUTE_H + +#include +#include + +#define PCI_DEV_PIRQ_ROUTES \ + PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(ME_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(GBE_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(EHCI2_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(EHCI1_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, B, C, D) + +/* + * Route each PIRQ[A-H] to a PIC IRQ[0-15] + * Reserved: 0, 1, 2, 8, 13 + * ACPI/SCI: 9 + */ +#define PIRQ_PIC_ROUTES \ + PIRQ_PIC(A, 5), \ + PIRQ_PIC(B, 6), \ + PIRQ_PIC(C, 7), \ + PIRQ_PIC(D, 10), \ + PIRQ_PIC(E, 11), \ + PIRQ_PIC(F, 12), \ + PIRQ_PIC(G, 14), \ + PIRQ_PIC(H, 15) + +#endif /* IRQROUTE_H */ -- cgit v1.2.3