From 662da6cf7b181ea2787ba001d9cbb6d41916abec Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Mon, 16 Mar 2020 22:46:57 -0700 Subject: soc/intel/xeon_sp: Refactor code to allow for additional CPUs types Refactor the code and split it into Xeon common and CPU-specific code. Move most Skylake-SP code into skx/ and keep common code in the current folder. This is a preparation for future work that will enable next generation server CPU. TEST=Tested on OCP Tioga Pass. There does not seem to be degradation of stability as far as I could tell. Signed-off-by: Andrey Petrov Change-Id: I448e6cfd6a85efb83d132ad26565557fe55a265a Reviewed-on: https://review.coreboot.org/c/coreboot/+/39601 Reviewed-by: David Hendricks Tested-by: build bot (Jenkins) --- src/mainboard/ocp/tiogapass/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/mainboard/ocp/tiogapass/Kconfig') diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 9dbc066f10..1d501e6db0 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -19,10 +19,9 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_32768 select HAVE_ACPI_TABLES - select SOC_INTEL_XEON_SP select MAINBOARD_USES_FSP2_0 - select FSP_CAR select IPMI_KCS + select SOC_INTEL_SKYLAKE_SP config MAINBOARD_DIR string -- cgit v1.2.3