From 5e8709f89e3e4ee385b1798730281b2a9dacdcef Mon Sep 17 00:00:00 2001 From: Johnny Lin Date: Thu, 11 Jun 2020 15:25:37 +0800 Subject: mb/ocp/deltalake: Update SMBIOS type 2 Location In Chassis from BMC There are 4 slots in YV3, Location In Chassis should be 1~4. Tested=on OCP Delta Lake, dmidecode -t 2 verified the string is correct. Change-Id: I3b65ecc6f6421d85d1cb890c522be4787362a01b Signed-off-by: Johnny Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/42277 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Zhang Reviewed-by: Christian Walter --- src/mainboard/ocp/deltalake/ipmi.c | 25 +++++++++++++++++++++++++ src/mainboard/ocp/deltalake/ipmi.h | 20 ++++++++++++-------- src/mainboard/ocp/deltalake/ramstage.c | 22 ++++++++++++++++++++++ 3 files changed, 59 insertions(+), 8 deletions(-) (limited to 'src/mainboard/ocp') diff --git a/src/mainboard/ocp/deltalake/ipmi.c b/src/mainboard/ocp/deltalake/ipmi.c index b8a4c53c4d..f60abf2e5c 100644 --- a/src/mainboard/ocp/deltalake/ipmi.c +++ b/src/mainboard/ocp/deltalake/ipmi.c @@ -46,3 +46,28 @@ enum cb_err ipmi_get_pcie_config(uint8_t *pcie_config) return CB_SUCCESS; } + +enum cb_err ipmi_get_slot_id(uint8_t *slot_id) +{ + int ret; + struct ipmi_config_rsp { + struct ipmi_rsp resp; + uint8_t board_sku_id; + uint8_t board_rev_id; + uint8_t slot_id; + uint8_t slot_config_id; + } __packed; + struct ipmi_config_rsp rsp; + + ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_GET_BOARD_ID, + NULL, 0, (unsigned char *) &rsp, sizeof(rsp)); + + if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) { + printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n", + __func__, ret, rsp.resp.completion_code); + return CB_ERR; + } + *slot_id = rsp.slot_id; + + return CB_SUCCESS; +} diff --git a/src/mainboard/ocp/deltalake/ipmi.h b/src/mainboard/ocp/deltalake/ipmi.h index 310ff27248..039c576847 100644 --- a/src/mainboard/ocp/deltalake/ipmi.h +++ b/src/mainboard/ocp/deltalake/ipmi.h @@ -5,15 +5,18 @@ #include -#define IPMI_NETFN_OEM 0x30 -#define IPMI_OEM_SET_PPIN 0x77 -#define IPMI_OEM_GET_PCIE_CONFIG 0xf4 +#define IPMI_NETFN_OEM 0x30 +#define IPMI_OEM_SET_PPIN 0x77 +#define IPMI_OEM_GET_PCIE_CONFIG 0xf4 +#define IPMI_OEM_GET_BOARD_ID 0x37 -#define PCIE_CONFIG_UNKNOWN 0x0 -#define PCIE_CONFIG_A 0x1 -#define PCIE_CONFIG_B 0x2 -#define PCIE_CONFIG_C 0x3 -#define PCIE_CONFIG_D 0x4 +enum config_type { + PCIE_CONFIG_UNKNOWN = 0x0, + PCIE_CONFIG_A = 0x1, + PCIE_CONFIG_B = 0x2, + PCIE_CONFIG_C = 0x3, + PCIE_CONFIG_D = 0x4, +}; struct ppin_req { uint32_t cpu0_lo; @@ -24,4 +27,5 @@ struct ppin_req { enum cb_err ipmi_set_ppin(struct ppin_req *req); enum cb_err ipmi_get_pcie_config(uint8_t *config); +enum cb_err ipmi_get_slot_id(uint8_t *slot_id); #endif diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c index a8f92ad04a..9380304c0a 100644 --- a/src/mainboard/ocp/deltalake/ramstage.c +++ b/src/mainboard/ocp/deltalake/ramstage.c @@ -4,10 +4,32 @@ #include #include #include +#include #include "ipmi.h" +#define SLOT_ID_LEN 2 + extern struct fru_info_str fru_strings; +static char slot_id_str[SLOT_ID_LEN]; + +/* Override SMBIOS 2 Location In Chassis from BMC */ +const char *smbios_mainboard_location_in_chassis(void) +{ + uint8_t slot_id = 0; + + if (ipmi_get_slot_id(&slot_id) != CB_SUCCESS) { + printk(BIOS_ERR, "IPMI get slot_id failed\n"); + return ""; + } + /* Sanity check, slot_id can only be 1~4 since there are 4 slots in YV3 */ + if (slot_id < PCIE_CONFIG_A || slot_id > PCIE_CONFIG_D) { + printk(BIOS_ERR, "slot_id %d is not between 1~4\n", slot_id); + return ""; + } + snprintf(slot_id_str, SLOT_ID_LEN, "%d", slot_id); + return slot_id_str; +} static void dl_oem_smbios_strings(struct device *dev, struct smbios_type11 *t) { -- cgit v1.2.3