From 7916f4cef62bf032af86368a9df45db833d09b79 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 9 Feb 2012 16:07:41 +0200 Subject: AMD Geode cpus: apply un-written naming rules MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Kconfig directives to select chip drivers for compile literally match the chip directory names capitalized and underscored. Rename directories and Kconfig as follows: model_lx -> geode_lx model_gx1 -> geode_gx1 model_gx2 -> geode_gx2 Change-Id: Ib8bf1e758b88f9efed1cf8b11c76b796388e7147 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/613 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/pcengines/alix2d/Kconfig | 2 +- src/mainboard/pcengines/alix2d/devicetree.cb | 2 +- src/mainboard/pcengines/alix2d/romstage.c | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'src/mainboard/pcengines/alix2d') diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig index 264f5d9e97..c2e4b2e9dd 100644 --- a/src/mainboard/pcengines/alix2d/Kconfig +++ b/src/mainboard/pcengines/alix2d/Kconfig @@ -3,7 +3,7 @@ if BOARD_PCENGINES_ALIX2D config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_X86 - select CPU_AMD_LX + select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 select HAVE_PIRQ_TABLE diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb index edcbc06623..836ba3547c 100644 --- a/src/mainboard/pcengines/alix2d/devicetree.cb +++ b/src/mainboard/pcengines/alix2d/devicetree.cb @@ -37,7 +37,7 @@ chip northbridge/amd/lx # APIC cluster is late CPU init. device lapic_cluster 0 on - chip cpu/amd/model_lx + chip cpu/amd/geode_lx device lapic 0 on end end end diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index 6ced8f279e..0e8cc63a16 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -106,9 +106,9 @@ static u8 spd_read_byte(u8 device, u8 address) #include "northbridge/amd/lx/pll_reset.c" #include "northbridge/amd/lx/raminit.c" #include "lib/generic_sdram.c" -#include "cpu/amd/model_lx/cpureginit.c" -#include "cpu/amd/model_lx/syspreinit.c" -#include "cpu/amd/model_lx/msrinit.c" +#include "cpu/amd/geode_lx/cpureginit.c" +#include "cpu/amd/geode_lx/syspreinit.c" +#include "cpu/amd/geode_lx/msrinit.c" /** Early mainboard specific GPIO setup. */ static void mb_gpio_init(void) -- cgit v1.2.3