From ca39df81957c45ae215e5423aabadf1e60299120 Mon Sep 17 00:00:00 2001 From: Philipp Deppenwiese Date: Wed, 1 Mar 2017 02:37:36 +0100 Subject: mainboard/pcengines/apu2: Add LPC TPM support APU2 exposes a LPC header which can be used in conjunction with a LPC TPM module. Change-Id: If9312370a5071ffbeb6d83888c75fa69a0c27819 Signed-off-by: Philipp Deppenwiese Reviewed-on: https://review.coreboot.org/18523 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/pcengines/apu2/Kconfig | 2 ++ src/mainboard/pcengines/apu2/devicetree.cb | 5 ++++- src/mainboard/pcengines/apu2/romstage.c | 4 ++++ 3 files changed, 10 insertions(+), 1 deletion(-) (limited to 'src/mainboard/pcengines') diff --git a/src/mainboard/pcengines/apu2/Kconfig b/src/mainboard/pcengines/apu2/Kconfig index 4303b84ec2..013df791d2 100644 --- a/src/mainboard/pcengines/apu2/Kconfig +++ b/src/mainboard/pcengines/apu2/Kconfig @@ -28,6 +28,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_8192 select HUDSON_DISABLE_IMC select USE_BLOBS + select TPM + select MAINBOARD_HAS_LPC_TPM config MAINBOARD_DIR string diff --git a/src/mainboard/pcengines/apu2/devicetree.cb b/src/mainboard/pcengines/apu2/devicetree.cb index 3c5ec81b6c..4f3206408e 100644 --- a/src/mainboard/pcengines/apu2/devicetree.cb +++ b/src/mainboard/pcengines/apu2/devicetree.cb @@ -73,7 +73,10 @@ chip northbridge/amd/pi/00730F01/root_complex device pnp 2e.607 off end device pnp 2e.e off end end # SIO NCT5104D - end # LPC 0x439d + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end # LPC TPM + end # LPC 0x439d device pci 14.7 on end # SD device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index a0d925f0a2..c95adb6555 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -31,6 +31,8 @@ #include #include #include +#include + #include "gpio_ftns.h" static void early_lpc_init(void); @@ -92,6 +94,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) */ disable_cache_as_ram(); + init_tpm(false); + outb(0xEA, 0xCD6); outb(0x1, 0xcd7); -- cgit v1.2.3