From cadc70f7974db25144381b3ea26d4b660233f4dd Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sun, 12 May 2019 13:44:22 +0200 Subject: soc/intel/broadwell: Move GPIO init to a common place This also links the gpio configuration instead of including it as a header. Change-Id: I9309d2b842495f6cff33fdab18aa139a82c1959c Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/32759 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Matt DeVillier --- src/mainboard/purism/librem_bdw/Makefile.inc | 1 + src/mainboard/purism/librem_bdw/gpio.c | 115 +++++++++++++++++++++++++ src/mainboard/purism/librem_bdw/gpio.h | 120 --------------------------- src/mainboard/purism/librem_bdw/romstage.c | 5 -- 4 files changed, 116 insertions(+), 125 deletions(-) create mode 100644 src/mainboard/purism/librem_bdw/gpio.c delete mode 100644 src/mainboard/purism/librem_bdw/gpio.h (limited to 'src/mainboard/purism') diff --git a/src/mainboard/purism/librem_bdw/Makefile.inc b/src/mainboard/purism/librem_bdw/Makefile.inc index 293e186cec..16ce37a95f 100644 --- a/src/mainboard/purism/librem_bdw/Makefile.inc +++ b/src/mainboard/purism/librem_bdw/Makefile.inc @@ -13,5 +13,6 @@ ## GNU General Public License for more details. ## +romstage-y += gpio.c romstage-y += variants/$(VARIANT_DIR)/pei_data.c ramstage-y += variants/$(VARIANT_DIR)/pei_data.c diff --git a/src/mainboard/purism/librem_bdw/gpio.c b/src/mainboard/purism/librem_bdw/gpio.c new file mode 100644 index 0000000000..510299659e --- /dev/null +++ b/src/mainboard/purism/librem_bdw/gpio.c @@ -0,0 +1,115 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +const struct gpio_config mainboard_gpio_config[] = { + PCH_GPIO_INPUT, /* 0 */ + PCH_GPIO_INPUT, /* 1 */ + PCH_GPIO_INPUT, /* 2 */ + PCH_GPIO_INPUT, /* 3 */ + PCH_GPIO_INPUT, /* 4 */ + PCH_GPIO_INPUT, /* 5 */ + PCH_GPIO_INPUT, /* 6 */ + PCH_GPIO_INPUT, /* 7 */ + PCH_GPIO_INPUT, /* 8 */ + PCH_GPIO_INPUT, /* 9 */ + PCH_GPIO_ACPI_SCI, /* 10 */ + PCH_GPIO_INPUT, /* 11 */ + PCH_GPIO_INPUT, /* 12 */ + PCH_GPIO_INPUT, /* 13 */ + PCH_GPIO_INPUT, /* 14 */ + PCH_GPIO_INPUT, /* 15 */ + PCH_GPIO_INPUT, /* 16 */ + PCH_GPIO_INPUT, /* 17 */ + PCH_GPIO_NATIVE, /* 18 */ + PCH_GPIO_NATIVE, /* 19 */ + PCH_GPIO_INPUT, /* 20 */ + PCH_GPIO_INPUT, /* 21 */ + PCH_GPIO_INPUT, /* 22 */ + PCH_GPIO_INPUT, /* 23 */ + PCH_GPIO_INPUT, /* 24 */ + PCH_GPIO_INPUT, /* 25 */ + PCH_GPIO_INPUT, /* 26 */ + PCH_GPIO_INPUT, /* 27 */ + PCH_GPIO_INPUT, /* 28 */ + PCH_GPIO_NATIVE, /* 29 */ + PCH_GPIO_NATIVE, /* 30 */ + PCH_GPIO_NATIVE, /* 31 */ + PCH_GPIO_INPUT, /* 32 */ + PCH_GPIO_INPUT, /* 33 */ + PCH_GPIO_INPUT, /* 34 */ + PCH_GPIO_NATIVE, /* 35 */ + PCH_GPIO_NATIVE, /* 36 */ + PCH_GPIO_NATIVE, /* 37 */ + PCH_GPIO_INPUT, /* 38 */ + PCH_GPIO_NATIVE, /* 39 */ + PCH_GPIO_NATIVE, /* 40 */ + PCH_GPIO_INPUT, /* 41 */ + PCH_GPIO_INPUT, /* 42 */ + PCH_GPIO_INPUT, /* 43 */ + PCH_GPIO_INPUT, /* 44 */ + PCH_GPIO_INPUT, /* 45 */ + PCH_GPIO_INPUT, /* 46 */ + PCH_GPIO_INPUT, /* 47 */ + PCH_GPIO_INPUT, /* 48 */ + PCH_GPIO_INPUT, /* 49 */ + PCH_GPIO_INPUT, /* 50 */ + PCH_GPIO_INPUT, /* 51 */ + PCH_GPIO_INPUT, /* 52 */ + PCH_GPIO_INPUT, /* 53 */ + PCH_GPIO_INPUT, /* 54 */ + PCH_GPIO_INPUT, /* 55 */ + PCH_GPIO_INPUT, /* 56 */ + PCH_GPIO_INPUT, /* 57 */ + PCH_GPIO_INPUT, /* 58 */ + PCH_GPIO_INPUT, /* 59 */ + PCH_GPIO_INPUT, /* 60 */ + PCH_GPIO_NATIVE, /* 61 */ + PCH_GPIO_NATIVE, /* 62 */ + PCH_GPIO_NATIVE, /* 63 */ + PCH_GPIO_INPUT, /* 64 */ + PCH_GPIO_INPUT, /* 65 */ + PCH_GPIO_INPUT, /* 66 */ + PCH_GPIO_INPUT, /* 67 */ + PCH_GPIO_INPUT, /* 68 */ + PCH_GPIO_INPUT, /* 69 */ + PCH_GPIO_INPUT, /* 70 */ + PCH_GPIO_NATIVE, /* 71 */ + PCH_GPIO_NATIVE, /* 72 */ + PCH_GPIO_INPUT, /* 73 */ + PCH_GPIO_NATIVE, /* 74 */ + PCH_GPIO_NATIVE, /* 75 */ + PCH_GPIO_NATIVE, /* 76 */ + PCH_GPIO_INPUT, /* 77 */ + PCH_GPIO_INPUT, /* 78 */ + PCH_GPIO_INPUT, /* 79 */ + PCH_GPIO_INPUT, /* 80 */ + PCH_GPIO_NATIVE, /* 81 */ + PCH_GPIO_NATIVE, /* 82 */ + PCH_GPIO_INPUT, /* 83 */ + PCH_GPIO_INPUT, /* 84 */ + PCH_GPIO_INPUT, /* 85 */ + PCH_GPIO_INPUT, /* 86 */ + PCH_GPIO_INPUT, /* 87 */ + PCH_GPIO_INPUT, /* 88 */ + PCH_GPIO_INPUT, /* 89 */ + PCH_GPIO_INPUT, /* 90 */ + PCH_GPIO_INPUT, /* 91 */ + PCH_GPIO_INPUT, /* 92 */ + PCH_GPIO_INPUT, /* 93 */ + PCH_GPIO_INPUT, /* 94 */ + PCH_GPIO_END +}; diff --git a/src/mainboard/purism/librem_bdw/gpio.h b/src/mainboard/purism/librem_bdw/gpio.h deleted file mode 100644 index 98b09bc45a..0000000000 --- a/src/mainboard/purism/librem_bdw/gpio.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MAINBOARD_GPIO_H -#define MAINBOARD_GPIO_H - -#include - -static const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_INPUT, /* 0 */ - PCH_GPIO_INPUT, /* 1 */ - PCH_GPIO_INPUT, /* 2 */ - PCH_GPIO_INPUT, /* 3 */ - PCH_GPIO_INPUT, /* 4 */ - PCH_GPIO_INPUT, /* 5 */ - PCH_GPIO_INPUT, /* 6 */ - PCH_GPIO_INPUT, /* 7 */ - PCH_GPIO_INPUT, /* 8 */ - PCH_GPIO_INPUT, /* 9 */ - PCH_GPIO_ACPI_SCI, /* 10 */ - PCH_GPIO_INPUT, /* 11 */ - PCH_GPIO_INPUT, /* 12 */ - PCH_GPIO_INPUT, /* 13 */ - PCH_GPIO_INPUT, /* 14 */ - PCH_GPIO_INPUT, /* 15 */ - PCH_GPIO_INPUT, /* 16 */ - PCH_GPIO_INPUT, /* 17 */ - PCH_GPIO_NATIVE, /* 18 */ - PCH_GPIO_NATIVE, /* 19 */ - PCH_GPIO_INPUT, /* 20 */ - PCH_GPIO_INPUT, /* 21 */ - PCH_GPIO_INPUT, /* 22 */ - PCH_GPIO_INPUT, /* 23 */ - PCH_GPIO_INPUT, /* 24 */ - PCH_GPIO_INPUT, /* 25 */ - PCH_GPIO_INPUT, /* 26 */ - PCH_GPIO_INPUT, /* 27 */ - PCH_GPIO_INPUT, /* 28 */ - PCH_GPIO_NATIVE, /* 29 */ - PCH_GPIO_NATIVE, /* 30 */ - PCH_GPIO_NATIVE, /* 31 */ - PCH_GPIO_INPUT, /* 32 */ - PCH_GPIO_INPUT, /* 33 */ - PCH_GPIO_INPUT, /* 34 */ - PCH_GPIO_NATIVE, /* 35 */ - PCH_GPIO_NATIVE, /* 36 */ - PCH_GPIO_NATIVE, /* 37 */ - PCH_GPIO_INPUT, /* 38 */ - PCH_GPIO_NATIVE, /* 39 */ - PCH_GPIO_NATIVE, /* 40 */ - PCH_GPIO_INPUT, /* 41 */ - PCH_GPIO_INPUT, /* 42 */ - PCH_GPIO_INPUT, /* 43 */ - PCH_GPIO_INPUT, /* 44 */ - PCH_GPIO_INPUT, /* 45 */ - PCH_GPIO_INPUT, /* 46 */ - PCH_GPIO_INPUT, /* 47 */ - PCH_GPIO_INPUT, /* 48 */ - PCH_GPIO_INPUT, /* 49 */ - PCH_GPIO_INPUT, /* 50 */ - PCH_GPIO_INPUT, /* 51 */ - PCH_GPIO_INPUT, /* 52 */ - PCH_GPIO_INPUT, /* 53 */ - PCH_GPIO_INPUT, /* 54 */ - PCH_GPIO_INPUT, /* 55 */ - PCH_GPIO_INPUT, /* 56 */ - PCH_GPIO_INPUT, /* 57 */ - PCH_GPIO_INPUT, /* 58 */ - PCH_GPIO_INPUT, /* 59 */ - PCH_GPIO_INPUT, /* 60 */ - PCH_GPIO_NATIVE, /* 61 */ - PCH_GPIO_NATIVE, /* 62 */ - PCH_GPIO_NATIVE, /* 63 */ - PCH_GPIO_INPUT, /* 64 */ - PCH_GPIO_INPUT, /* 65 */ - PCH_GPIO_INPUT, /* 66 */ - PCH_GPIO_INPUT, /* 67 */ - PCH_GPIO_INPUT, /* 68 */ - PCH_GPIO_INPUT, /* 69 */ - PCH_GPIO_INPUT, /* 70 */ - PCH_GPIO_NATIVE, /* 71 */ - PCH_GPIO_NATIVE, /* 72 */ - PCH_GPIO_INPUT, /* 73 */ - PCH_GPIO_NATIVE, /* 74 */ - PCH_GPIO_NATIVE, /* 75 */ - PCH_GPIO_NATIVE, /* 76 */ - PCH_GPIO_INPUT, /* 77 */ - PCH_GPIO_INPUT, /* 78 */ - PCH_GPIO_INPUT, /* 79 */ - PCH_GPIO_INPUT, /* 80 */ - PCH_GPIO_NATIVE, /* 81 */ - PCH_GPIO_NATIVE, /* 82 */ - PCH_GPIO_INPUT, /* 83 */ - PCH_GPIO_INPUT, /* 84 */ - PCH_GPIO_INPUT, /* 85 */ - PCH_GPIO_INPUT, /* 86 */ - PCH_GPIO_INPUT, /* 87 */ - PCH_GPIO_INPUT, /* 88 */ - PCH_GPIO_INPUT, /* 89 */ - PCH_GPIO_INPUT, /* 90 */ - PCH_GPIO_INPUT, /* 91 */ - PCH_GPIO_INPUT, /* 92 */ - PCH_GPIO_INPUT, /* 93 */ - PCH_GPIO_INPUT, /* 94 */ - PCH_GPIO_END -}; - -#endif diff --git a/src/mainboard/purism/librem_bdw/romstage.c b/src/mainboard/purism/librem_bdw/romstage.c index 2e0ae85b95..6591229621 100644 --- a/src/mainboard/purism/librem_bdw/romstage.c +++ b/src/mainboard/purism/librem_bdw/romstage.c @@ -14,19 +14,14 @@ */ #include -#include #include #include #include -#include "gpio.h" void mainboard_romstage_entry(struct romstage_params *rp) { struct pei_data pei_data; - /* Initialize GPIOs */ - init_gpios(mainboard_gpio_config); - /* Fill out PEI DATA */ memset(&pei_data, 0, sizeof(pei_data)); mainboard_fill_pei_data(&pei_data); -- cgit v1.2.3