From 956a9f6a9cf0e51c9155738baa566b192897648f Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Wed, 29 Mar 2017 17:09:37 +0200 Subject: siemens/mc_apl1: Activate PTN3460 eDP to LVDS bridge IC This mainboard uses a LVDS connection for LCD panels. Apollo Lake SoC provides a display controller with three independent pipes (1x eDP and 2x DP/HDMI). PTN3460 is an embedded DisplayPort to LVDS bridge device that enables connectivity between an eDP source and LVDS display panel (http://www.nxp.com/documents/data_sheet/PTN3460.pdf). The bridge contains an On-chip Extended Display Identification Data (EDIT) emulation for EDIT data structures. This patch sets up PTN3460 to be used with the appropriate LCD panel. Change-Id: Ib8fa79bb608f1842f26c1af3d7bf4bb0513fa94d Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/19043 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/siemens/mc_apl1/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mainboard/siemens/mc_apl1/Makefile.inc') diff --git a/src/mainboard/siemens/mc_apl1/Makefile.inc b/src/mainboard/siemens/mc_apl1/Makefile.inc index 21df84c404..223a45f1e7 100644 --- a/src/mainboard/siemens/mc_apl1/Makefile.inc +++ b/src/mainboard/siemens/mc_apl1/Makefile.inc @@ -8,3 +8,4 @@ romstage-y += gpio.c ramstage-y += mainboard.c ramstage-y += gpio.c +ramstage-y += ptn3460.c -- cgit v1.2.3