From 4125dde2bebff0c5aaa9088a90bfdf0359fa2d4b Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Mon, 8 May 2017 12:49:58 +0200 Subject: siemens/mc_apl1: Correct GPIO settings - set GPIO_183 to high level for enabling the power of SD card - delete all GPIOs for JTAG interface because they lead to problems with Lauterbach debug hardware Change-Id: I24bfff479601933c43e3dcbfa3baa49510831703 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/19623 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh --- src/mainboard/siemens/mc_apl1/gpio.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) (limited to 'src/mainboard/siemens/mc_apl1/gpio.c') diff --git a/src/mainboard/siemens/mc_apl1/gpio.c b/src/mainboard/siemens/mc_apl1/gpio.c index bdeff73798..b872b8d832 100644 --- a/src/mainboard/siemens/mc_apl1/gpio.c +++ b/src/mainboard/siemens/mc_apl1/gpio.c @@ -69,7 +69,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1), /* SDCARD_CLK_FB */ PAD_CFG_GPI(GPIO_186, UP_20K, DEEP), /* SDCARD_LVL_WP */ /* EN_SD_SOCKET_PWR_L for SD slot power control. Default on. */ - PAD_CFG_GPO(GPIO_183, 0, DEEP), /* SDIO_PWR_DOWN_N */ + PAD_CFG_GPO(GPIO_183, 1, DEEP), /* SDIO_PWR_DOWN_N */ /* SMBus */ PAD_CFG_GPI(SMB_ALERTB, UP_20K, DEEP), /* SMB_ALERT _N */ @@ -350,17 +350,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPIO_72, DN_20K, DEEP), /* GP_CAMERASB10 */ PAD_CFG_GPI(GPIO_73, DN_20K, DEEP), /* GP_CAMERASB11 */ - /* JTAG interface. */ - PAD_CFG_NF(TCK, DN_20K, DEEP, NF1), /* TCK */ - PAD_CFG_NF(TRST_B, DN_20K, DEEP, NF1), /* TRST_B */ - PAD_CFG_NF(TMS, UP_20K, DEEP, NF1), /* TMS */ - PAD_CFG_NF(TDI, UP_20K, DEEP, NF1), /* TDI */ - PAD_CFG_NF(CX_PMODE, NONE, DEEP, NF1), /* CX_PMODE */ - PAD_CFG_NF(CX_PREQ_B, UP_20K, DEEP, NF1), /* CX_PREQ_B */ - PAD_CFG_NF(JTAGX, UP_20K, DEEP, NF1), /* JTAGX */ - PAD_CFG_NF(CX_PRDY_B, UP_20K, DEEP, NF1), /* CX_PRDY_B */ - PAD_CFG_NF(TDO, UP_20K, DEEP, NF1), /* TDO */ - /* CNV bridge described into IAFW Vol2. */ /* GPIO_[216:219] described into EDS Vol1. */ PAD_CFG_GPO(CNV_BRI_DT, 0, DEEP), /* Reserve of FPGA */ -- cgit v1.2.3