From d127be102be3744b9b81036e5fa53acbddaae03b Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Mon, 23 Apr 2018 10:55:39 +0200 Subject: siemens/mc_apl1: Provide baseboard and variant concepts Siemens will provide further boards based on Apollo Lake. These differ only slightly. To avoid copying the complete directory of the reference board we simply create variants that only contain the differences, like google/reef does. To further the ability of multiple variant boards to share code provide a place to land the split-up changes. This patch provides the tooling by using a new Kconfig value, VARIANT_DIR, as well as the Make plumbing. The directory layout with a single variant mc_apl1 (which is also the baseboard) looks like this: variants/baseboard - code variants/baseboard/include/baseboard - headers variants/mc_apl1 - code variants/mc_apl1/include/variant - headers New boards would then be added under their board name within the 'variants' directory. No split has been done with providing different logic yet. This is purely an organizational change. Change-Id: Ia3c1f45daee3b9690a448b82edbeec552ee05973 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/25785 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Werner Zeh --- src/mainboard/siemens/mc_apl1/romstage.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/mainboard/siemens/mc_apl1/romstage.c') diff --git a/src/mainboard/siemens/mc_apl1/romstage.c b/src/mainboard/siemens/mc_apl1/romstage.c index 24d03b6cac..d56c7eedb4 100644 --- a/src/mainboard/siemens/mc_apl1/romstage.c +++ b/src/mainboard/siemens/mc_apl1/romstage.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright 2016 Google Inc. - * Copyright (C) 2017 Siemens AG + * Copyright (C) 2017-2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,7 +21,7 @@ #include #include #include -#include "brd_gpio.h" +#include static const uint8_t Ch0_Bit_swizzling[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -55,7 +55,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) size_t num; /* setup early gpio before memory */ - pads = brd_early_gpio_table(&num); + pads = variant_early_gpio_table(&num); gpio_configure_pads(pads, num); /* Get DRAM configuration data from hwinfo block. -- cgit v1.2.3