From 0867062412dd4bfe5a556e5f3fd85ba5b682d79b Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 30 Jun 2009 15:17:49 +0000 Subject: This patch unifies the use of config options in v2 to all start with CONFIG_ It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/soyo/sy-6ba-plus-iii/Config.lb | 30 +++--- src/mainboard/soyo/sy-6ba-plus-iii/Options.lb | 120 ++++++++++++------------ src/mainboard/soyo/sy-6ba-plus-iii/auto.c | 2 +- src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c | 2 +- 4 files changed, 77 insertions(+), 77 deletions(-) (limited to 'src/mainboard/soyo') diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb b/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb index e98657f397..e9e0af931e 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb +++ b/src/mainboard/soyo/sy-6ba-plus-iii/Config.lb @@ -18,38 +18,38 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -## XIP_ROM_SIZE must be a power of 2. -default XIP_ROM_SIZE = 64 * 1024 +## CONFIG_XIP_ROM_SIZE must be a power of 2. +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb arch i386 end driver mainboard.o -if HAVE_PIRQ_TABLE +if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end makerule ./failover.E - depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" - action "../romcc -E -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" + depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" + action "../romcc -E -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end makerule ./failover.inc - depends "$(MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" - action "../romcc -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" + depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc" + action "../romcc -O2 -mcpu=p2 --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@" end makerule ./auto.E - # depends "$(MAINBOARD)/auto.c option_table.h ../romcc" - depends "$(MAINBOARD)/auto.c ../romcc" - action "../romcc -E -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" + # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc" + depends "$(CONFIG_MAINBOARD)/auto.c ../romcc" + action "../romcc -E -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@" end makerule ./auto.inc - # depends "$(MAINBOARD)/auto.c option_table.h ../romcc" - depends "$(MAINBOARD)/auto.c ../romcc" - action "../romcc -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" + # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc" + depends "$(CONFIG_MAINBOARD)/auto.c ../romcc" + action "../romcc -O2 -mcpu=p2 -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@" end mainboardinit cpu/x86/16bit/entry16.inc mainboardinit cpu/x86/32bit/entry32.inc ldscript /cpu/x86/16bit/entry16.lds ldscript /cpu/x86/32bit/entry32.lds -if USE_FALLBACK_IMAGE +if CONFIG_USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else @@ -59,7 +59,7 @@ end mainboardinit arch/i386/lib/cpu_reset.inc mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds -if USE_FALLBACK_IMAGE +if CONFIG_USE_FALLBACK_IMAGE ldscript /arch/i386/lib/failover.lds mainboardinit ./failover.inc end diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb b/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb index 4813e8fdd4..9166a9042a 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb +++ b/src/mainboard/soyo/sy-6ba-plus-iii/Options.lb @@ -18,82 +18,82 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -uses HAVE_MP_TABLE +uses CONFIG_HAVE_MP_TABLE uses CONFIG_CBFS -uses HAVE_PIRQ_TABLE -uses USE_FALLBACK_IMAGE -uses HAVE_FALLBACK_BOOT -uses HAVE_HARD_RESET -uses HAVE_OPTION_TABLE -uses USE_OPTION_TABLE +uses CONFIG_HAVE_PIRQ_TABLE +uses CONFIG_USE_FALLBACK_IMAGE +uses CONFIG_HAVE_FALLBACK_BOOT +uses CONFIG_HAVE_HARD_RESET +uses CONFIG_HAVE_OPTION_TABLE +uses CONFIG_USE_OPTION_TABLE uses CONFIG_ROM_PAYLOAD -uses IRQ_SLOT_COUNT -uses MAINBOARD -uses MAINBOARD_VENDOR -uses MAINBOARD_PART_NUMBER +uses CONFIG_IRQ_SLOT_COUNT +uses CONFIG_MAINBOARD +uses CONFIG_MAINBOARD_VENDOR +uses CONFIG_MAINBOARD_PART_NUMBER uses COREBOOT_EXTRA_VERSION -uses ARCH -uses FALLBACK_SIZE -uses STACK_SIZE -uses HEAP_SIZE -uses ROM_SIZE -uses ROM_SECTION_SIZE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET +uses CONFIG_ARCH +uses CONFIG_FALLBACK_SIZE +uses CONFIG_STACK_SIZE +uses CONFIG_HEAP_SIZE +uses CONFIG_ROM_SIZE +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_IMAGE_SIZE +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_SECTION_OFFSET uses CONFIG_ROM_PAYLOAD_START uses CONFIG_COMPRESSED_PAYLOAD_LZMA -uses PAYLOAD_SIZE -uses _ROMBASE -uses _RAMBASE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE -uses HAVE_MP_TABLE -uses CROSS_COMPILE +uses CONFIG_PAYLOAD_SIZE +uses CONFIG_ROMBASE +uses CONFIG_RAMBASE +uses CONFIG_XIP_ROM_SIZE +uses CONFIG_XIP_ROM_BASE +uses CONFIG_HAVE_MP_TABLE +uses CONFIG_CROSS_COMPILE uses CC -uses HOSTCC -uses OBJCOPY -uses DEFAULT_CONSOLE_LOGLEVEL -uses MAXIMUM_CONSOLE_LOGLEVEL +uses CONFIG_HOSTCC +uses CONFIG_OBJCOPY +uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL +uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 -uses TTYS0_BAUD -uses TTYS0_BASE -uses TTYS0_LCS +uses CONFIG_TTYS0_BAUD +uses CONFIG_TTYS0_BASE +uses CONFIG_TTYS0_LCS uses CONFIG_UDELAY_TSC uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 -uses MAINBOARD_VENDOR -uses MAINBOARD_PART_NUMBER +uses CONFIG_MAINBOARD_VENDOR +uses CONFIG_MAINBOARD_PART_NUMBER uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN -default ROM_SIZE = 256 * 1024 -default HAVE_FALLBACK_BOOT = 1 -default HAVE_MP_TABLE = 0 -default HAVE_HARD_RESET = 0 +default CONFIG_ROM_SIZE = 256 * 1024 +default CONFIG_HAVE_FALLBACK_BOOT = 1 +default CONFIG_HAVE_MP_TABLE = 0 +default CONFIG_HAVE_HARD_RESET = 0 default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 -default HAVE_PIRQ_TABLE = 1 -default IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. -default MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. -default MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. -default ROM_IMAGE_SIZE = 64 * 1024 -default FALLBACK_SIZE = 128 * 1024 -default STACK_SIZE = 8 * 1024 -default HEAP_SIZE = 16 * 1024 -default HAVE_OPTION_TABLE = 0 -#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE -default USE_OPTION_TABLE = 0 -default _RAMBASE = 0x00004000 +default CONFIG_HAVE_PIRQ_TABLE = 1 +default CONFIG_IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb. +default CONFIG_MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb. +default CONFIG_MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb. +default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 +default CONFIG_FALLBACK_SIZE = 128 * 1024 +default CONFIG_STACK_SIZE = 8 * 1024 +default CONFIG_HEAP_SIZE = 16 * 1024 +default CONFIG_HAVE_OPTION_TABLE = 0 +#default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE +default CONFIG_USE_OPTION_TABLE = 0 +default CONFIG_RAMBASE = 0x00004000 default CONFIG_ROM_PAYLOAD = 1 -default CROSS_COMPILE = "" -default CC = "$(CROSS_COMPILE)gcc -m32" -default HOSTCC = "gcc" +default CONFIG_CROSS_COMPILE = "" +default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32" +default CONFIG_HOSTCC = "gcc" default CONFIG_CONSOLE_SERIAL8250 = 1 -default TTYS0_BAUD = 115200 -default TTYS0_BASE = 0x3f8 -default TTYS0_LCS = 0x3 # 8n1 -default DEFAULT_CONSOLE_LOGLEVEL = 9 -default MAXIMUM_CONSOLE_LOGLEVEL = 9 +default CONFIG_TTYS0_BAUD = 115200 +default CONFIG_TTYS0_BASE = 0x3f8 +default CONFIG_TTYS0_LCS = 0x3 # 8n1 +default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 +default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 default CONFIG_CONSOLE_VGA = 1 default CONFIG_PCI_ROM_RUN = 1 default CONFIG_CBFS = 0 diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/auto.c b/src/mainboard/soyo/sy-6ba-plus-iii/auto.c index c324dc1abf..36e8cd439d 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/auto.c +++ b/src/mainboard/soyo/sy-6ba-plus-iii/auto.c @@ -54,7 +54,7 @@ static void main(unsigned long bist) if (bist == 0) early_mtrr_init(); - it8671f_enable_serial(SERIAL_DEV, TTYS0_BASE); + it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); report_bist_failure(bist); diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c b/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c index 751c9ee135..22f29e11c3 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c +++ b/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c @@ -23,7 +23,7 @@ const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ - 32 + 16 * IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ + 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ 0x00, /* Interrupt router bus */ (0x07 << 3) | 0x0, /* Interrupt router dev */ 0xc00, /* IRQs devoted exclusively to PCI usage */ -- cgit v1.2.3