From 318e2ac974e4f02e75fcfe9772b90de3dbe01327 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 18 Apr 2016 14:34:18 +0300 Subject: AMD CIMX: Drop unused code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We never define B1_IMAGE or B2_IMAGE. These are about building CIMx as separate binary modules, while coreboot builds these into same romstage or ramstage module. Change-Id: I9cfa3f0bff8332aff4b661d56d0e7b340a992992 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/14393 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer Reviewed-by: Kerry Sheh --- src/mainboard/supermicro/h8qgi/rd890_cfg.c | 1 - src/mainboard/supermicro/h8scm/rd890_cfg.c | 1 - 2 files changed, 2 deletions(-) (limited to 'src/mainboard/supermicro') diff --git a/src/mainboard/supermicro/h8qgi/rd890_cfg.c b/src/mainboard/supermicro/h8qgi/rd890_cfg.c index c5ae2a3ffe..9bbb02a50c 100644 --- a/src/mainboard/supermicro/h8qgi/rd890_cfg.c +++ b/src/mainboard/supermicro/h8qgi/rd890_cfg.c @@ -220,7 +220,6 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON AmdInitializer(pConfig); pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */ - //pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS; pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS; pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry; diff --git a/src/mainboard/supermicro/h8scm/rd890_cfg.c b/src/mainboard/supermicro/h8scm/rd890_cfg.c index c5ae2a3ffe..9bbb02a50c 100644 --- a/src/mainboard/supermicro/h8scm/rd890_cfg.c +++ b/src/mainboard/supermicro/h8scm/rd890_cfg.c @@ -220,7 +220,6 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON AmdInitializer(pConfig); pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */ - //pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS; pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS; pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry; -- cgit v1.2.3