From 61657c2fae46e1ed8e2a4ddd42a2aa3caa8accfa Mon Sep 17 00:00:00 2001 From: Christian Walter Date: Tue, 14 Jan 2020 17:13:27 +0100 Subject: mainboard/supermicro/x11-lga1151-series: Disable UART3 and 4 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With UART3 and 4 enabled, the serial console in LinuxBoot crashes. This is a short-term solution until we found and fixed the original bug. Change-Id: I75cb387ef12944232b51f6d8d41810bb27754b05 Signed-off-by: Christian Walter Reviewed-on: https://review.coreboot.org/c/coreboot/+/38404 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- .../x11-lga1151-series/variants/x11ssh-tf/overridetree.cb | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/mainboard/supermicro') diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb index aace4f7487..3d46fe02a7 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb @@ -10,8 +10,6 @@ chip soc/intel/skylake register "gen1_dec" = "0x007c0a01" # Super IO SWC register "gen2_dec" = "0x000c0ca1" # IPMI KCS - register "gen3_dec" = "0x000c03e1" # UART3 - register "gen4_dec" = "0x000c02e1" # UART4 # PCIe configuration # Enable JPCIE1 @@ -116,11 +114,11 @@ chip soc/intel/skylake end device pnp 2e.5 off end # KBC device pnp 2e.7 on end # GPIO - device pnp 2e.b on # SUART3 + device pnp 2e.b off # SUART3 io 0x60 = 0x3e8 irq 0x70 = 4 end - device pnp 2e.c on # SUART4 + device pnp 2e.c off # SUART4 io 0x60 = 0x2e8 irq 0x70 = 3 end -- cgit v1.2.3