From a342f3937e7ce159fd170ab8cd26ba799a3bc9e4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 17 Oct 2018 10:56:26 +0200 Subject: src: Remove unneeded whitespace Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c | 4 ++-- src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c | 4 ++-- src/mainboard/supermicro/h8qme_fam10/romstage.c | 14 +++++++------- 3 files changed, 11 insertions(+), 11 deletions(-) (limited to 'src/mainboard/supermicro') diff --git a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c index b2bc0ddd31..58b5ba4ff9 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c +++ b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c @@ -99,12 +99,12 @@ void get_bus_conf(void) } for(i = 2; i < 8; i++) { - dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0)); + dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2, 0)); if (dev) { m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 ); + printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2); } } diff --git a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c index 75b1347aba..b3195584fd 100644 --- a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c +++ b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c @@ -105,12 +105,12 @@ void get_bus_conf(void) } for(i = 2; i < 8; i++) { - dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0)); + dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2, 0)); if (dev) { m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS); } else { - printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 ); + printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2); } } diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index 6aa20bbc2a..e51cf19ce2 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -89,17 +89,17 @@ static void sio_setup(void) // smbusx_write_byte(1, (0x58 >> 1), 0, 0x80); /* select bank0 */ smbusx_write_byte(1, (0x58 >> 1), 0xb1, 0xff); /* set FAN ctrl to DC mode */ - byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b); + byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE+1, 0), 0x7b); byte |= 0x20; - pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0x7b, byte); + pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+1, 0), 0x7b, byte); - dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0); + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1, 0), 0xa0); dword |= (1 << 0); - pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa0, dword); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1, 0), 0xa0, dword); - dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4); + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+1, 0), 0xa4); dword |= (1 << 16); - pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1 , 0), 0xa4, dword); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+1, 0), 0xa4, dword); } static const u8 spd_addr[] = { @@ -113,7 +113,7 @@ static const u8 spd_addr[] = { /* third node */ RC02, DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, /* fourth node */ - RC03, DIMM4, DIMM6,0 , 0, DIMM5, DIMM7, 0, 0, + RC03, DIMM4, DIMM6, 0, 0, DIMM5, DIMM7, 0, 0, #endif }; -- cgit v1.2.3