From c94d73e0e6703369831fe6d489a20d71ab2bb974 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Mon, 16 Jun 2014 17:24:14 +1000 Subject: mainboard: Clear up remaining SIO_PORT from Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Push back any board specific values back into romstage.c #defines and drop any remaining fragments of CONFIG_SIO_PORT in-tree. Change-Id: Ieb63fb0c2ab1a82b53bafd86686de7b21ac226c3 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/6045 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/supermicro/h8qgi/Kconfig | 7 ------- src/mainboard/supermicro/h8qgi/romstage.c | 6 +++++- src/mainboard/supermicro/h8scm/Kconfig | 7 ------- 3 files changed, 5 insertions(+), 15 deletions(-) (limited to 'src/mainboard/supermicro') diff --git a/src/mainboard/supermicro/h8qgi/Kconfig b/src/mainboard/supermicro/h8qgi/Kconfig index 44057ae497..ee78a2fbba 100644 --- a/src/mainboard/supermicro/h8qgi/Kconfig +++ b/src/mainboard/supermicro/h8qgi/Kconfig @@ -72,13 +72,6 @@ config RAMBASE hex default 0x200000 -config SIO_PORT - hex - default 0x164E - help - though UARTs are on the NUVOTON BMC, port 0x164E - PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E - config DRIVERS_PS2_KEYBOARD bool default y diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c index f9d3ba1a6e..d95db3c6f6 100644 --- a/src/mainboard/supermicro/h8qgi/romstage.c +++ b/src/mainboard/supermicro/h8qgi/romstage.c @@ -35,6 +35,10 @@ #include #include +/* though UARTs are on the NUVOTON BMC, port 0x164E + * PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E + */ +#define SIO_PORT 0x164e void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -49,7 +53,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) report_bist_failure(bist); sb7xx_51xx_enable_wideio(0, 0x1600); /* though UARTs are on the NUVOTON BMC */ - wpcm450_enable_dev(WPCM450_SP1, CONFIG_SIO_PORT, CONFIG_TTYS0_BASE); + wpcm450_enable_dev(WPCM450_SP1, SIO_PORT, CONFIG_TTYS0_BASE); sb7xx_51xx_disable_wideio(0); post_code(0x34); diff --git a/src/mainboard/supermicro/h8scm/Kconfig b/src/mainboard/supermicro/h8scm/Kconfig index 2b4cec042c..a9757dfb62 100644 --- a/src/mainboard/supermicro/h8scm/Kconfig +++ b/src/mainboard/supermicro/h8scm/Kconfig @@ -75,13 +75,6 @@ config RAMBASE hex default 0x200000 -config SIO_PORT - hex - default 0x164E - help - though UARTs are on the NUVOTON BMC, port 0x164E - PS2 keyboard and mouse are on SUPERIO_WINBOND_W83627DHG, port 0x2E - config DRIVERS_PS2_KEYBOARD bool default y -- cgit v1.2.3